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參數(shù)資料
| 型號： | M68AW064FZB |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 1 Mbit 64K x16 3.0V Asynchronous SRAM |
| 中文描述： | 1兆位64K的x16 3.0V異步SRAM |
| 文件頁數(shù)： | 10/18頁 |
| 文件大?。?/td> | 265K |
| 代理商： | M68AW064FZB |
M68AW064F
10/18
Table 7. Read and Standby Mode AC Characteristics
Note: 1. At any given temperature and voltage condition, t
GHQZ
is less than t
GLQX
, t
BHQZ
is less than t
BLQX
and t
EHQZ
is less than t
ELQX
for
any given device.
2. C
L
= 5pF.
Symbol
Parameter
M68AW064F
Unit
55
70
Min.
Max.
Min.
Max.
t
AVAV
Read Cycle Time
55
70
ns
t
AVQV
Address Valid to Output Valid
55
70
ns
t
AXQX
Data hold from address change
10
10
ns
t
BHQZ
(1, 2)
Upper/Lower Byte Enable High to Output Hi-Z
20
25
ns
t
BLQV
Upper/Lower Byte Enable Low to Output Valid
25
35
ns
t
BLQX
Upper/Lower Byte Enable Low to Output Transition
5
5
ns
t
EHQZ
(1, 2)
Chip Enable High to Output Hi-Z
20
25
ns
t
ELQV
Chip Enable Low to Output Valid
55
70
ns
t
ELQX
Chip Enable Low to Output Transition
10
10
ns
t
GHQZ (1, 2)
Output Enable High to Output Hi-Z
20
25
ns
t
GLQV
Output Enable Low to Output Valid
25
35
ns
t
GLQX
Output Enable Low to Output Transition
5
5
ns
t
PD
Chip Enable or UB/LB High to Power Down
55
70
ns
t
PU
Chip Enable or UB/LB Low to Power Up
0
0
ns
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