參數(shù)資料
型號(hào): M68AW128ML70ND1E
廠商: 意法半導(dǎo)體
英文描述: 2 Mbit (128K x16) 3.0V Asynchronous SRAM
中文描述: 2兆位(128K的× 16)3.0V異步SRAM
文件頁數(shù): 4/22頁
文件大?。?/td> 335K
代理商: M68AW128ML70ND1E
M68AW128M
4/22
SUMMARY DESCRIPTION
The M68AW128M is a 2 Mbit (2,097,152 bit)
CMOS SRAM, organized as 131,072 words by 16
bits. The device features fully static operation re-
quiring no external clocks or timing strobes, with
equal address access and cycle times. It requires
a single 2.7 to 3.6V supply. This device has an au-
tomatic power-down feature, reducing the power
consumption by over 99% when deselected.
The M68AW128M is available in TFBGA48
(0.75 mm pitch) and in TSOP44 Type II packages.
In addition to the standard version, the packages
are also available in Lead-free version, in compli-
ance with JEDEC Std J-STD-020B, the ST ECO-
PACK 7191395 Specification, and the RoHS
(Restriction of Hazardous Substances) directive.
All packages are compliant with Lead-free solder-
ing processes.
Figure 2. Logic Diagram
Table 1. Signal Names
AI04835b
17
A0-A16
W
DQ0-DQ15
VCC
M68AW128M
G
16
E
UB
LB
VSS
A0-A16
Address Inputs
DQ0-DQ15
Data Input/Output
E
Chip Enable
G
Output Enable
W
Write Enable
UB
Upper Byte Enable Input
LB
Lower Byte Enable Input
V
CC
Supply Voltage
V
SS
Ground
NC
Not Connected Internally
DU
Don’t Use as Internally Connected
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參數(shù)描述
M68AW128ML70ND1F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit (128K x16) 3.0V Asynchronous SRAM
M68AW128ML70ND1T 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit (128K x16) 3.0V Asynchronous SRAM
M68AW128ML70ND6 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 2 MBIT(128K X16)靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
M68AW128ML70ND6E 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit (128K x16) 3.0V Asynchronous SRAM
M68AW128ML70ND6F 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:2 Mbit (128K x16) 3.0V Asynchronous SRAM