參數(shù)資料
型號(hào)： M69AW024BE
廠商： 意法半導(dǎo)體
英文描述： 16 Mbit (1M x16) 3V Asynchronous PSRAM
中文描述： 16兆位（1米× 16）3V的異步移動(dòng)存儲(chǔ)芯片
文件頁(yè)數(shù)： 20/25頁(yè)
文件大?。?/td> 147K
代理商： M69AW024BE
M69AW024BE
20/25
Table 9. Standby, Power-Down and Power-Up AC Parameters
Note: 1. Applicable both to Power-Down and Power-Up.
2. Some data might be written into any address location if t
EHWL
(min) is not satisfied.
3. The Input Transition Time used in AC measurements is 5ns.
4. TBD = to be defined.
Figure 16. Power-up Mode AC Waveforms - 1
Note: t
EHCH2
is defined from V
CC
reaching V
CC
(min).
Figure 17. Power-up Mode AC Waveforms - 2
Note: t
CHEL
is defined from V
CC
reaching V
CC
(min) and applicable both for E1 and E2 signals.
Symbol
Alt.
Parameter
M69AW024BE
Unit
–60
Min
Max
t
CLEL
t
CSP
E2 Low Setup Time for Power Down Entry
10
ns
t
ELCH
t
C2LP
E2 Low Hold Time after Power Down Entry
80
ns
t
CHEL(1)
t
CHH
E1 High Hold Time following E2 High after Power-Down Exit
E1 High Hold Time following E2 High after Power-Up
300
μs
t
EHCH
t
CHS
E1 High Setup Time following E2 High after Power-Down Exit
0
ns
t
EHGH
t
CHOX
E1 High to G Invalid Time for Standby Entry
10
ns
t
EHWH(2)
t
CHWX
E1 High to W Invalid Time for Standby Entry
10
ns
t
τ
(3)
t
τ
Input Transition Time
1
25
ns
t
EHCH2
t
C2LH
Power-Up Time
50
μs
AI07740b
VCC
VCC min
E2
E1
tCHEL
tEHCH2
tEHCH
0V
AI09945
VDD
tEHEL
VDDmin
E1
E2
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