參數(shù)資料
型號: M6MGB166S2BWG
廠商: Mitsubishi Electric Corporation
英文描述: CMOS 3.3V-ONLY FLASH MEMORY & CMOS SRAM Stacked-CSP
中文描述: 3.3的CMOS只快閃記憶體
文件頁數(shù): 14/30頁
文件大?。?/td> 253K
代理商: M6MGB166S2BWG
Nov 1999 , Rev.2.3
MITSUBISHI LSIs
16,777,216-BIT (1,048,576 -WORD BY 16-BIT ) CMOS
3.3V-ONLY FLASH MEMORY &
2,097,152-BIT (131,072-WORD BY 16-BIT) CMOS SRAM
Stacked-CSP (Chip Scale Package)
M6MGB/T166S2BWG
14
AC WAVEFORMS FOR PAGE PROGRAM OPERATION (F-WE# control)
41H
DIN
t
WPH
t
WP
t
DS
t
DH
t
CS
t
CH
t
WC
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
ADDRESS VALID
F-CE#
F-OE#
F-WE#
DATA
F-RY/BY#
t
AH
V
IH
V
OH
V
OL
V
IL
t
AS
DIN
SRD
DIN
V
IH
V
IL
t
OEH
t
DAP
t
WHRL
PROGRAM
READ STATUS
REGISTER
WRITE READ
ARRAY COMMAND
FFH
7FH
01H~7EH
00H
t
a(CE)
t
a(OE)
V
IL
V
IH
V
IL
t
BLH
t
BLS
t
PS
V
IH
F-RP#
BANK ADDRESS VALID
The other bank
address
VALID
VALID
VALID
DOUT
t
OEH
t
GHWL
t
a(OE)
t
a(CE)
F-A19~F-A17,
A16~A7
A6 ~A0
F-WP#
BAN VALID
AC WAVEFORMS FOR PAGE PROGRAM OPERATION (F-CE# control)
41H
DIN
t
CEPH
t
CEP
t
DS
t
DH
t
WS
t
WH
t
WC
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
ADDRESS VALID
F-CE#
F-OE#
F-WE#
DATA
t
AH
V
IH
V
IL
t
AS
DIN
SRD
DIN
V
IH
V
IL
t
OEH
t
DAP
PROGRAM
READ STATUS
REGISTER
WRITE READ
ARRAY COMMAND
FFH
7FH
01H~7EH
00H
t
a(CE)
t
a(OE)
BANK ADDRESS VALID
VALID
VALID
VALID
DOUT
t
a(CE)
t
OEH
t
GHEL
t
a(OE)
The other bank
address
F-RY/BY#
V
OH
V
OL
t
EHRL
t
PS
V
IH
V
IL
V
IH
F-RP#
V
IL
F-WP#
t
BLH
t
BLS
F-A19~F-A17,
A16~A7
A6 ~A0
BAN VALID
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