參數(shù)資料
型號(hào): M74HC131B1R
廠商: 意法半導(dǎo)體
英文描述: 3 TO 8 LINE DECODER/LATCH
中文描述: 3至8線譯碼器/鎖存
文件頁(yè)數(shù): 1/12頁(yè)
文件大?。?/td> 262K
代理商: M74HC131B1R
M54HC131
M74HC131
October 1992
3 TO 8 LINE DECODER/LATCH
B1R
(Plastic Package)
ORDER CODES :
M54HC131F1R
M74HC131B1R
M74HC131M1R
M74HC131C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
.
HIGH SPEED
t
PD
= 22 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) at T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
VNIH = VNIL= 28 % VCC (MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
| I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR)= 2 V to 6 V
.
PIN AND FUNCTION COMPATIBLE WITH
54/74LS131
The M54/74HC131 is a highspeed CMOS 3 TO 8
LINE DECODER/LATCH fabricated in silicon gate
C2MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
This device is a DECODER/LATCH capable of se-
lectingarbitrarily oneofeight outputsbythreebinary
inputs A, B, and C, inthis case, the selected output
is at logic ”low”.
Also, whenENABLE input G1 isset lowor ENABLE
input G2 is sethigh, selection isinhibited regardless
of other input signals and alltheoutputs are athigh.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
DESCRIPTION
1/12
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M74HC132B1R 功能描述:邏輯門 Quad 2-In Schmt NAND RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量(輸入/輸出):2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel