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參數(shù)資料
| 型號(hào)： | M74HC651B1R |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low-Voltage Adjustable Precision Shunt Regulator 6-SC70 -40 to 85 |
| 中文描述： | HC652八路總線收發(fā)器/注冊(cè)3態(tài)HC651八路總線收發(fā)器/注冊(cè)三態(tài)，刑事調(diào)查。 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 202K |
| 代理商： | M74HC651B1R |
TRUTH TABLE
HC652 (The truth table for HC651 is the same as this, but with the outputs inverted)
GAB GBA CAB CBA SAB SBA
A
B
FUNCTION
L
H
INPUTS
Z
INPUTS
INPUTS
Z
INPUTS
Both the A bus and the B bus are inputs
The output functions of the A and B bus are disabled
Both the A and B buz are used for inputs to the
internal flip-flops. Data at the bus will be stored on
low to high transition of the clock inputs
The A bus are outputs and the B bus are inputs
The data at the B bus are displayed at the A bus
X
X
X
X
X
X
L
L
OUTPUTS
L
H
L
H
INPUTS
L
H
L
H
X*
X
X
L
X*
X
L
The data at the B bus ar displayed at the A bus.
The data of the B bus are stored to the internal
flip-flop on low to high transition of th clock pulse
X*
X
X
H
Qn
X
The data stored to the internal flip-flop are dispayed
at the A bus
The data at the B bus are stored to the internal flip-
flop on low to high transition of the clock pulse. The
states of the internal flip-flops output directly to the
A bus
X*
X
H
L
H
L
H
H
H
INPUTS
L
H
L
H
OUTPUTS
L
H
L
H
The A bus are inputs and the B bus are outputs
The data at the A bus are displayed at the B bus
X
X*
L
X
X*
L
X
The data at the A bus are displayed at the B bus.
The data of the A bus are stored to the internal flip-
flop on low to high transition of the clock pulse
X
X*
H
X
X
Qn
The data stored to the internal flip-flops are
displayed at the B bus
the data at the A bus are stored to the internal flip-
flop on low to high transition of the clock pulse. The
states of the internal flip-flops output directly to the
B bus
X*
H
X
L
H
L
H
H
L
OUTPUTS OUTPUTS
Qn
Both the A bus and the B bus are outputs
The data stored to the internal flip-flops are
displayed at the A and B bus respectively
The output at the A bus are displayed at the B bus,
the output at the B bus are displayed at the A bus
respectively
X
X
H
H
Qn
H
H
Qn
Qn
X
Z
Qn
*
: DON’TCARE
:HIGH IMPEDANCE
:THE DATA STOREDTO THE INTERNALFLIP-FLOPSBY MOST RECENT LOWTO HIGHTRANSITIONOF THECLOCK INPUTS
: THEDATA AT THE A ANDB BUS WILLBE STORED TOTHE INTERNALFLIP-FLOPS ONEVERY LOWTOHIGH TRANSITIONOF
THE CLOCK INPUTS
M74HC651/652
3/12
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