參數(shù)資料
型號(hào): M74HC670M1R
廠商: 意法半導(dǎo)體
元件分類: 寄存器
英文描述: 4 WORD X 4 BIT REGISTER FILE 3 STATE
中文描述: 4字× 4位寄存器文件三態(tài)
文件頁(yè)數(shù): 8/12頁(yè)
文件大?。?/td> 264K
代理商: M74HC670M1R
AC ELECTRICAL CHARACTERISTICS (CL =50 pF, Input tr =tf =6 ns)
Symbol
Parameter
Test Conditions
Value
Unit
VCC
(V)
TA =25
oC
54HC and 74HC
-40 to 85
oC
74HC
-55 to 125
oC
54HC
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tTLH
tTHL
Output Transition
Time
2.0
30
75
95
110
ns
4.5
8
151922
6.0
7
131619
tPLH
tPHL
Propagation
Delay Time
(RA, RB - Qn)
2.0
96
185
230
280
ns
4.5
24
37
46
56
6.0
20
31
39
48
tPLH
tPHL
Propagation
Delay Time
(WE - Qn)
2.0
108
220
275
330
ns
4.5
27
44
55
66
6.0
23
37
47
56
tPLH
tPHL
Propagation
Delay Time
(Dn - Qn)
2.0
104
185
230
280
ns
4.5
26
37
46
56
6.0
22
31
39
48
tPZL
tPZH
Output Disable
Time
2.0
RL =1 K
42
110
140
165
ns
4.5
13
22
28
33
6.0
11
19
24
28
tPLZ
tPHZ
Output Disable
Time
2.0
RL =1 K
25
95
120
145
ns
4.5
13
19
24
29
6.0
11
16
20
25
tW(L)
Minimum Pulse
Width
(WE)
2.0
16
75
95
110
ns
4.5
4
151922
6.0
3
131619
ts
Minimum Set-up
Time (Dn - WE)
(WA, WB - WE)
2.0
12
50
65
75
ns
4.5
3
101315
6.0
3
9
11
13
th
Minimum Hold
Time
(Dn - WE)
2.0
0
ns
4.5
0
6.0
0
th
Minimum Hold
Time
(WA, WB - WE)
2.0
5
ns
4.5
5
6.0
5
tlatch
Minimum Latch
Time
(WE - RA, RB)
2.0
5
ns
4.5
5
6.0
5
CIN
Input Capacitance
5
10
pF
CPD (*)
Power Dissipation
Capacitance
96
pF
(*) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load.
(Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD
VCC fIN +ICC
M54/M74HC670
5/12
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