參數(shù)資料
型號: M74HCT74B1R
廠商: 意法半導(dǎo)體
英文描述: DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
中文描述: 雙D型觸發(fā)器與預(yù)置和清除
文件頁數(shù): 1/10頁
文件大?。?/td> 432K
代理商: M74HCT74B1R
1/10
August 2001
I
HIGH SPEED :
f
MAX
= 48MHz (TYP.) at V
CC
= 4.5V
LOW POWER DISSIPATION:
I
CC
=2
μ
A(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS :
V
IH
= 2V (MIN.) V
IL
= 0.8V (MAX)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
I
I
I
I
I
DESCRIPTION
The M74HCT74 is an high speed CMOS DUAL D
TYPE FLIP FLOP WITH CLEAR fabricated with
silicon gate C
2
MOS technology.
A signal on the D INPUT (nD) is transferred on the
Q OUTPUT during the positive going transition of
the clock pulse. CLEAR (CLR) and PRESET (PR)
are independent of the clock and accomplished by
a low on the appropriate input.
The M74HCT74 is designed to directly interface
HSC
2
MOS systems with TTL and NMOS
components.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
M74HCT74
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
SOP
TSSOP
M74HCT74B1R
M74HCT74M1R
M74HCT74RM13TR
M74HCT74TTR
TSSOP
DIP
SOP
相關(guān)PDF資料
PDF描述
M74HCT74C1R DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
M74HCT74M1R DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
M74HCT74TTR DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
M74HCT74MTC Dual D-Type Flip-Flop with Preset and Clear
M74HCT75 4 BIT D TYPE LATCH
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