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參數(shù)資料
| 型號： | M74VHC132DTR2G |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | Quad 2−Input NAND Schmitt Trigger |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 109K |
| 代理商： | M74VHC132DTR2G |
Semiconductor Components Industries, LLC, 2005
December, 2005 Rev. 3
1
Publication Order Number:
MC74VHC132/D
MC74VHC132
Quad 2Input NAND Schmitt
Trigger
The MC74VHC132 is an advanced high speed CMOS Schmitt
NAND trigger fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
Pin configuration and function are the same as the MC74VHC00,
but the inputs have hysteresis and, with its Schmitt trigger function,
the VHC132 can be used as a line receiver which will receive slow
input signals.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: t
PD
= 4.9 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 2 A (Max) at T
A
= 25
°
C
High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Chip Complexity: 72 FETs or 18 Equivalent Gates
PbFree Packages are Available*
(Top View)
Figure 1. Pinout: 14Lead Packages
13
14
12
11
10
9
8
2
1
3
4
5
6
7
V
CC
B4
A4
Y4
B3
A3
Y3
A1
B1
Y1
A2
B2
Y2
GND
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAMS
TSSOP14
DT SUFFIX
CASE 948G
1
SOEIAJ14
M SUFFIX
CASE 965
SOIC14
D SUFFIX
CASE 751A
1
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A
WL, L
Y
WW, W
G or
= Assembly Location
= Wafer Lot
= Year
= Work Week
= PbFree Package
1
14
VHC132
ALYWG
VHC132G
AWLYWW
1
14
VHC
132
ALYW
1
14
(Note: Microdot may be in either location)
FUNCTION TABLE
Inputs
Output
Y
A
B
L
L
H
H
L
H
L
H
H
H
H
L
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