![](http://datasheet.mmic.net.cn/170000/M7A3P1000-1FG144FG144_datasheet_9119985/M7A3P1000-1FG144FG144_10.png)
ProASIC3 Flash Family FPGAs
II
v1.0
I/Os Per Package1
ProASIC3
Devices
A3P015
A3P030
A3P060
A3P125
A3P250 3
A3P400 3
A3P600
A3P1000
ARM7 Devices
M7A3P1000
Cortex-M1
Devices
M1A3P250 3,6
M1A3P400 3
M1A3P600
M1A3P1000
Package
I/O Type
Si
ng
le-Ended
I/O
Si
ng
le-Ended
I/O
Si
ng
le-Ended
I/O
Si
ng
le-Ended
I/O
Si
ng
le-Ended
I/O
2
D
if
fer
ential
I/O
P
a
irs
Si
ng
le-Ended
I/O
2
D
if
fer
ential
I/O
P
a
irs
Si
ng
le-Ended
I/O
2
D
if
fer
ential
I/O
P
a
irs
Si
ng
le-Ended
I/O
2
D
if
fer
ential
I/O
P
a
irs
QN68
49
–
–––
QN132
–
818084
87
19
–
VQ100
–
77
71
68
13
–
TQ144
–
91
100
–
––––––
PQ208
–
133
151
34
151
34
154
35
154
35
FG144
–
96
97
24
97
25
97
25
97
25
FG256
–
157
38
178
38
177
43
177
44
FG484
–
194
38
235
60
300
74
Notes:
handbook to ensure complying with design and board migration requirements.
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For A3P250 and A3P400 devices, the maximum number of LVPECL pairs in east and west banks cannot exceed 15. Refer
4. FG256 and FG484 are footprint-compatible packages.
"G" in the part number.
6. The M1A3P250 device does not support FG256 or QN132 packages.
Table 1-1 ProASIC3 FPGAs Package Sizes Dimensions
Package
QN68
QN132
VQ100
TQ144
PQ208
FG144
FG256
FG484
Length × Width
(mm\mm)
8 × 8
14 × 14
20 × 20
28 × 28
13 × 13
17 × 17
23 × 23
Nominal Area
(mm2)
64
196
400
784
169
289
529
Pitch (mm)
0.40.5
0.50.5
0.51.0
1.01.0
Height (mm)
0.90
0.75
1.00
1.40
3.40
1.45
1.60
2.23