參數(shù)資料
型號: M87C257-15F6X
廠商: 意法半導(dǎo)體
元件分類: EPROM
英文描述: ADDRESS LATCHED 256K 32K x 8 UV EPROM and OTP EPROM
中文描述: 地址鎖存256K 32K的× 8紫外線EPROM和檢察官辦公室存儲器
文件頁數(shù): 8/13頁
文件大?。?/td> 143K
代理商: M87C257-15F6X
tAVEL
VALID
AI00557
A0-A14
Q0-Q7
ASVPP
VCC
G
DATA IN
DATA OUT
E
tQVEL
tVPHEL
tVCHEL
tEHQX
tELEH
tGLQV
tQXGL
tGHQZ
tGHAX
PROGRAM
VERIFY
Figure 6. Programming and Verify Modes AC Waveforms
PRESTO II Programming Algorithm
PRESTO II Programming Algorithm allows to pro-
gram the whole array with a guaranteed margin, in
a typical time of 3.5 seconds. Programming with
PRESTO II involves the application of a sequence
of 100
μ
s program pulses to each byte until a correct
verify occurs (see Figure 7). During programming
and verify operation, a MARGIN MODE circuit is
automatically activated in order to guarantee that
each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M87C257s in parallel with
different data is also easily accomplished. Except
for E, all like inputs including G of the parallel
M87C257 may be common. A TTL low level pulse
applied to a M87C257’s E input, with V
PP
at 12.75V,
will program that M87C257. A high level E input
inhibits the other M87C257s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correctly
programmed. The verify is accomplished with G at
V
IL
, E at V
IH
, V
PP
at 12.75V and V
CC
at 6.25V.
AI00760B
n = 0
Last
Addr
VERIFY
E = 100
μ
s Pulse
++n
= 25
++ Addr
VCC = 6.25V, VPP = 12.75V
FAIL
CHECK ALL BYTES
1st: VCC = 6V
2nd: VCC = 4.2V
YES
NO
YES
NO
YES
NO
Figure 7. Programming Flowchart
8/13
M87C257
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