參數(shù)資料
型號(hào): M93S56-DS3TP
廠商: 意法半導(dǎo)體
英文描述: Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85
中文描述: 4Kbit,2Kbit和1Kbit 16位寬MICROWIRE串行EEPROM的訪問與街區(qū)保護(hù)
文件頁數(shù): 8/34頁
文件大小: 525K
代理商: M93S56-DS3TP
M93S66, M93S56, M93S46
8/34
Figure 4. READ, WRITE, WEN and WDS Sequences
Note: For the meanings of An, Xn, Qn and Dn, see
Table 2.
and
Table 3.
.
AI00889D
1 1 0 An
A0
Qn
Q0
DATA OUT
D
S
Q
S
WRITE
ADDR
OP
CODE
1 0
An
A0
DATA IN
D
Q
OP
CODE
Dn
D0
1
BUSY
READY
S
WRITE
ENABLE
1
0
Xn X0
D
OP
CODE
1
0
1
S
WRITE
DISABLE
1
0
Xn X0
D
OP
CODE
0
0
0
CHECK
STATUS
ADDR
PRE
READ
PRE
W
PRE
W
PRE
相關(guān)PDF資料
PDF描述
M93S56-DS3TG Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85
M93S56-DS3T Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85
M93S56-DS3P Quadruple 2-Input Positive-NAND Gates 14-SOIC -40 to 85
M93S56-DS3G Quadruple 2-Input Positive-NAND Gates 14-SSOP -40 to 85
M93S56-DS3 Quadruple 2-Input Positive-NAND Gates 14-SSOP -40 to 85
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