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參數(shù)資料
| 型號： | M93S56-RDW3G |
| 廠商： | 意法半導體 |
| 英文描述： | Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 85 |
| 中文描述： | 4Kbit，2Kbit和1Kbit 16位寬MICROWIRE串行EEPROM的訪問與街區(qū)保護 |
| 文件頁數(shù)： | 10/34頁 |
| 文件大小： | 525K |
| 代理商： | M93S56-RDW3G |
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M93S66, M93S56, M93S46
10/34
Figure 5. PAWRITE and WRAL Sequence
Note: For the meanings of An, Xn and Dn, please see
Table 2.
and
Table 3.
.
Page Write
A Page Write to Memory (PAWRITE) instruction
contains the first address to be written, followed by
up to 4 data words.
After the receipt of each data word, bits A1-A0 of
the internal address register are incremented, the
high order bits remaining unchanged (A7-A2 for
M93S66, M93S56; A5-A2 for M93S46). Users
must take care, in the software, to ensure that the
last word address has the same upper order ad-
dress bits as the initial address transmitted to
avoid address roll-over.
The Page Write to Memory (PAWRITE) instruction
will not be executed if any of the 4 words address-
es the protected area.
Write Enable (W) must be held High before and
during the instruction. Input address and data, on
Serial Data Input (D) are sampled on the rising
edge of Serial Clock (C).
After the last data bit has been sampled,
the Chip
Select Input (S) must be taken Low before the next
rising edge of Serial Clock (C).
If Chip Select Input
(S) is brought Low before or after this specific time
frame, the self-timed programming cycle will not
AI00890C
S
PAGE
WRITE
1 1
An
A0
DATA IN
D
Q
OP
CODE
Dn
D0
1
BUSY
READY
CHECK
STATUS
ADDR
PRE
W
S
WRITE
ALL
1 0
Xn X0
DATA IN
D
Q
OP
CODE
Dn
D0
0
BUSY
READY
CHECK
STATUS
ADDR
PRE
W
0 1
相關PDF資料 |
PDF描述 |
|---|---|
| M93S56-RDS6TP | 4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S56-RDS6TG | Quadruple 2-Input Positive-AND Gates 14-SO -40 to 85 |
| M93S56-RDS6T | Quadruple 2-Input Positive-AND Gates 14-SO -40 to 85 |
| M93S56-RDS6P | Quadruple 2-Input Positive-AND Gates 14-PDIP -40 to 85 |
| M93S56-RDS6G | Quadruple 2-Input Positive-AND Gates 14-PDIP -40 to 85 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M93S56-RDW3P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S56-RDW3T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S56-RDW3TG | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S56-RDW3TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
| M93S56-RDW6 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit 16-bit wide MICROWIRE Serial Access EEPROM with Block Protection |
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