參數(shù)資料
型號: M93S56-RDW3TP
廠商: 意法半導體
英文描述: Quadruple 2-Input Positive-AND Gates 14-TSSOP -40 to 85
中文描述: 4Kbit,2Kbit和1Kbit 16位寬MICROWIRE串行EEPROM的訪問與街區(qū)保護
文件頁數(shù): 28/34頁
文件大小: 525K
代理商: M93S56-RDW3TP
M93S66, M93S56, M93S46
28/34
PACKAGE MECHANICAL
Figure 13. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline
Note: Drawing is not to scale.
Table 20. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data
Symb.
mm
inches
Typ.
Min.
Max.
Typ.
Min.
Max.
A
5.33
0.210
A1
0.38
0.015
A2
3.30
2.92
4.95
0.130
0.115
0.195
b
0.46
0.36
0.56
0.018
0.014
0.022
b2
1.52
1.14
1.78
0.060
0.045
0.070
c
0.25
0.20
0.36
0.010
0.008
0.014
D
9.27
9.02
10.16
0.365
0.355
0.400
E
7.87
7.62
8.26
0.310
0.300
0.325
E1
6.35
6.10
7.11
0.250
0.240
0.280
e
2.54
0.100
eA
7.62
0.300
eB
10.92
0.430
L
3.30
2.92
3.81
0.130
0.115
0.150
PDIP-B
A2
A1
A
L
b
e
D
E1
8
1
c
eA
b2
eB
E
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