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參數(shù)資料
| 型號： | M95020-RBN6TG |
| 廠商： | 意法半導體 |
| 元件分類： | DRAM |
| 英文描述： | Replaced by SN74ABT7819A : 512 x 18 x 2 bidirectional synchronous FIFO memory 80-LQFP 0 to 70 |
| 中文描述： | 4Kbit，2Kbit和1Kbit SPI總線串行EEPROM的高速時鐘 |
| 文件頁數(shù)： | 26/37頁 |
| 文件大?。?/td> | 586K |
| 代理商： | M95020-RBN6TG |
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M95040, M95020, M95010
26/37
Table 19. AC Characteristics (M950x0, Device Grade 3)
Note: 1. t
CH
+ t
CL
must never be less than the shortest possible clock period, 1 / f
C
(max)
2. Value guaranteed by characterization, not 100% tested in production.
3. Previous product: identified by Process Identification letter K.
4. Present product: identified by Process Identification letter W or G.
Test conditions specified in
Table 11.
and
Table 8.
Symbol
Alt.
Parameter
Min.
3
Max.
3
Min.
4
Max.
4
Unit
f
C
f
SCK
Clock Frequency
D.C.
2
D.C.
5
MHz
t
SLCH
t
CSS1
S Active Setup Time
200
90
ns
t
SHCH
t
CSS2
S Not Active Setup Time
200
90
ns
t
SHSL
t
CS
S Deselect Time
200
100
ns
t
CHSH
t
CSH
S Active Hold Time
200
90
ns
t
CHSL
S Not Active Hold Time
200
90
ns
t
CH 1
t
CLH
Clock High Time
200
90
ns
t
CL 1
t
CLL
Clock Low Time
200
90
ns
t
CLCH 2
t
RC
Clock Rise Time
1
1
μs
t
CHCL 2
t
FC
Clock Fall Time
1
1
μs
t
DVCH
t
DSU
Data In Setup Time
40
20
ns
t
CHDX
t
DH
Data In Hold Time
50
30
ns
t
HHCH
Clock Low Hold Time after HOLD not Active
140
70
ns
t
HLCH
Clock Low Hold Time after HOLD Active
90
40
ns
t
CHHL
Clock High Set-up Time before HOLD Active
t
CH
60
ns
t
CHHH
Clock High Set-up Time before HOLD not
Active
t
CH
60
ns
t
SHQZ 2
t
DIS
Output Disable Time
250
100
ns
t
CLQV
t
V
Clock Low to Output Valid
150
60
ns
t
CLQX
t
HO
Output Hold Time
0
0
ns
t
QLQH 2
t
RO
Output Rise Time
100
50
ns
t
QHQL 2
t
FO
Output Fall Time
100
50
ns
t
HHQV
t
LZ
100
50
ns
t
HLQZ 2
t
HZ
HOLD Low to Output High-Z
250
100
ns
t
W
t
WC
Write Time
10
5
ms
相關PDF資料 |
PDF描述 |
|---|---|
| M95020-RBN6T | Replaced by SN74ABT7819A : 512 x 18 x 2 bidirectional synchronous FIFO memory 80-LQFP 0 to 70 |
| M95020-RBN6P | Replaced by SN74ABT7819A : 512 x 18 x 2 bidirectional synchronous FIFO memory 80-QFP 0 to 70 |
| M95020-RBN6G | Replaced by SN74ABT7819A : 512 x 18 x 2 bidirectional synchronous FIFO memory 80-LQFP 0 to 70 |
| M95020-RBN6 | Octal Registered Transceivers With 3-State Outputs 24-SSOP -40 to 85 |
| M95020-RBN3TP | Octal Registered Transceivers With 3-State Outputs 24-SSOP -40 to 85 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M95020-RBN6TG/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RBN6TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RBN6TP/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW3 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW3/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
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