參數(shù)資料
型號(hào): M95020-SDW5T
廠商: 意法半導(dǎo)體
英文描述: Scan Test Devices With Octal Bus Transceivers 24-SOIC -40 to 85
中文描述: 4Kbit,2Kbit和1Kbit SPI總線串行EEPROM的高速時(shí)鐘
文件頁數(shù): 19/37頁
文件大?。?/td> 586K
代理商: M95020-SDW5T
19/37
M95040, M95020, M95010
POWER-UP AND DELIVERY STATE
Power-up State
After Power-up, the device is in the following state:
low power Standby Power mode
deselected (after Power-up, a falling edge is
required on Chip Select (S) before any
instructions can be started).
not in the Hold Condition
the Write Enable Latch (WEL) is reset to 0
Write In Progress (WIP) is reset to 0
The BP1 and BP0 bits of the Status Register are
unchanged from the previous power-down (they
are non-volatile bits).
Initial Delivery State
The device is delivered with the memory array set
at all 1s (FFh). The Block Protect (BP1 and BP0)
bits are initialized to 0.
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