- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄359117 > M95020-SMN3T (意法半導(dǎo)體) Scan Test Devices With Octal Bus Transceivers 24-SOIC -40 to 85 PDF資料下載
參數(shù)資料
| 型號(hào)： | M95020-SMN3T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Scan Test Devices With Octal Bus Transceivers 24-SOIC -40 to 85 |
| 中文描述： | 4Kbit，2Kbit和1Kbit SPI總線串行EEPROM的高速時(shí)鐘 |
| 文件頁(yè)數(shù)： | 15/37頁(yè) |
| 文件大?。?/td> | 586K |
| 代理商： | M95020-SMN3T |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)當(dāng)前第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)
15/37
M95040, M95020, M95010
Write Status Register (WRSR)
This instruction has no effect on bits b7, b6, b5, b4,
b1 and b0 of the Status Register.
As shown in
Figure 11.
, to send this instruction to
the device, Chip Select (S) is first driven Low. The
bits of the instruction byte and data byte are then
shifted in on Serial Data Input (D).
The instruction is terminated by driving Chip Se-
lect (S) High. Chip Select (S) must be driven High
after the rising edge of Serial Clock (C) that latch-
es the eighth bit of the data byte, and before the
the next rising edge of Serial Clock (C). If this con-
dition is not met, the Write Status Register
(WRSR) instruction is not executed. The self-
timed Write Cycle starts, and continues for a peri-
od t
W
(as specified in
Table 18.
to
Table 22.
), at
the end of which the Write in Progress (WIP) bit is
reset to 0.
The instruction is not accepted, and is not execut-
ed, under the following conditions:
–
if the Write Enable Latch (WEL) bit has not
been set to 1 (by executing a Write Enable
instruction just before)
–
if a Write Cycle is already in progress
–
if the device has not been deselected, by Chip
Select (S) being driven High, after the eighth
bit, b0, of the data byte has been latched in
–
if Write Protect (W) is Low.
Figure 11. Write Status Register (WRSR) Sequence
C
D
AI01445B
S
Q
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15
High Impedance
Instruction
Status
Register In
0
7
6
5
4
3
2
0
1
MSB
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M95020-SDW6T | Scan Test Devices With Octal Bus Transceivers 24-SOIC -40 to 85 |
| M95020-SDW5T | Scan Test Devices With Octal Bus Transceivers 24-SOIC -40 to 85 |
| M95020-RMN3P | 4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RMN3G | 4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-RDW6TP | 4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M95020-SMN5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-SMN6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4 Kbit, 2 Kbit and 1 Kbit serial SPI bus EEPROM with high-speed clock |
| M95020-WBN3 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-WBN3/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。