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參數(shù)資料
| 型號(hào)： | M95020-WBN3TG |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | EEPROM |
| 英文描述： | 4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| 中文描述： | 4Kbit，2Kbit和1Kbit SPI總線串行EEPROM的高速時(shí)鐘 |
| 文件頁(yè)數(shù)： | 16/37頁(yè) |
| 文件大小： | 586K |
| 代理商： | M95020-WBN3TG |
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M95040, M95020, M95010
16/37
Read from Memory Array (READ)
As shown in
Figure 12.
, to send this instruction to
the device, Chip Select (S) is first driven Low. The
bits of the instruction byte and address byte are
then shifted in, on Serial Data Input (D). For the
M95040, the most significant address bit, A8, is in-
corporated as bit b3 of the instruction byte, as
shown in
Table 5.
. The address is loaded into an
internal address register, and the byte of data at
that address is shifted out, on Serial Data Output
(Q).
If Chip Select (S) continues to be driven Low, an
internal bit-pointer is automatically incremented at
each clock cycle, and the corresponding data bit is
shifted out.
When the highest address is reached, the address
counter rolls over to zero, allowing the Read cycle
to be continued indefinitely. The whole memory
can, therefore, be read with a single READ instruc-
tion.
The Read cycle is terminated by driving Chip Se-
lect (S) High. The rising edge of the Chip Select
(S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within
any page.
The instruction is not accepted, and is not execut-
ed, if a Write cycle is currently in progress.
Table 6. Address Range Bits
Figure 12. Read from Memory Array (READ) Sequence
Note: Depending on the memory size, as shown in
Table 6.
, the most significant address bits are Don’t Care.
Device
M95040
M95020
M95010
Address Bits
A8-A0
A7-A0
A6-A0
C
D
AI01440E
S
Q
A7
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
A6 A5 A4 A3 A2 A1 A0
A8
20 21 22
7
6
5
4
3
2
0
1
High Impedance
Data Out
Instruction
Byte Address
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M95020-WBN3TP | 10-Bit Buffers/Drivers With 3-State Outputs 24-SOIC -40 to 85 |
| M95020-WBN5T | 10-Bit Buffers/Drivers With 3-State Outputs 24-SOIC -40 to 85 |
| M95020DW | 4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020MN | 9-Bit Bus-Interface D-Type Latches With 3-State Outputs 24-SSOP -40 to 85 |
| M95020-BN6TP | 4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M95020-WBN3TG/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-WBN3TP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-WBN3TP/W | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-WBN5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:4Kbit, 2Kbit and 1Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95020-WBN6 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 5.5V 2K (256x8) RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
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