參數(shù)資料
型號: M95080-BN6T
廠商: 意法半導(dǎo)體
元件分類: DRAM
英文描述: 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock
中文描述: 64/32/16/8千位串行SPI總線的EEPROM高速時鐘
文件頁數(shù): 5/39頁
文件大小: 590K
代理商: M95080-BN6T
5/39
M95640, M95320
SUMMARY DESCRIPTION
These electrically erasable programmable memo-
ry (EEPROM) devices are accessed by a high
speed SPI-compatible bus. The memory array is
organized as 8192 x 8 bit (M95640), and 4096 x 8
bit (M95320).
The device is accessed by a simple serial interface
that is SPI-compatible. The bus signals are C, D
and Q, as shown in Table 1 and Figure 2.
The device is selected when Chip Select (S) is tak-
en Low. Communications with the device can be
interrupted using Hold (HOLD).
Figure 2. Logic Diagram
Figure 3. DIP and SO Connections
Note: 1. See page 33 (onwards) for package dimensions, and how
to identify pin-1.
Figure 4. TSSOP14 Connections
Note: 1. See page 33 (onwards) for package dimensions, and how
to identify pin-1.
2. NC = Not Connected
Table 1. Signal Names
AI01789C
S
VCC
M95xxx
HOLD
VSS
W
Q
C
D
C
Serial Clock
D
Serial Data Input
Q
Serial Data Output
S
Chip Select
W
Write Protect
HOLD
Hold
V
CC
Supply Voltage
V
SS
Ground
D
VSS
C
HOLD
Q
W
S
VCC
AI01790D
M95xxx
1
2
3
4
8
7
6
5
1
2
3
4
5
6
7
AI02346C
14
13
9
8
10
D
VSS
W
C
S
Q
HOLD
NC
M95xxx
NC
NC
NC
NC
NC
12
11
VCC
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