參數(shù)資料
型號: M95080-DL3T
廠商: 意法半導體
元件分類: DRAM
英文描述: 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock
中文描述: 64/32/16/8千位串行SPI總線的EEPROM高速時鐘
文件頁數(shù): 38/39頁
文件大小: 590K
代理商: M95080-DL3T
M95640, M95320
38/39
REVISION HISTORY
Table 29. Document Revision History
Date
Rev.
Description of Revision
13-Jul-2000
1.2
Human Body Model meets JEDEC std (Table 2). Minor adjustments on pp 1,11,15. New clause
on p7. Addition of TSSOP8 package on pp 1, 2, Ordering Info, Mechanical Data
16-Mar-2001
1.3
Test condition added I
LI
and I
LO
, and specification of t
DLDH
and t
DHDL
removed.
t
CLCH
, t
CHCL
, t
DLDH
and t
DHDL
changed to 50ns for the -V range.
“-V” Voltage range changed to “2.7V to 3.6V” throughout.
Maximum lead soldering time and temperature conditions updated.
Instruction sequence illustrations updated.
“Bus Master and Memory Devices on the SPI bus” illustration updated.
Package Mechanical data updated.
19-Jul-2001
1.4
M95160 and M95080 devices removed to their own data sheet
06-Dec-2001
1.5
Endurance increased to 1M write/erase cycles
Instruction sequence illustrations updated
18-Dec-2001
2.0
Document reformatted using the new template. No parameters changed.
08-Feb-2002
2.1
Announcement made of planned upgrade to 10 MHz clock for the 5V, –40 to 85°C, range.
Endurance set to 100K write/erase cycles
18-Dec-2002
2.2
10MHz, 5MHz, 2MHz clock; 5ms, 10ms Write Time; 100K, 1M erase/write cycles distinguished
on front page, and in the DC and AC Characteristics tables
26-Mar-2003
2.3
Process indentification letter corrected in footnote to AC Characteristics table for temp. range 3
26-Jun-2003
2.4
-S voltage range upgraded by removing it and inserting -R voltage range in its place
15-Oct-2003
3.0
Table of contents, and Pb-free options added. V
IL
(min) improved to -0.45V.
21-Nov-2003
3.1
V
I
(min) and V
O
(min) corrected (improved) to -0.45V.
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