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參數(shù)資料
| 型號： | M95128-DW3PP |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 128 Kbit Serial SPI bus EEPROM with high speed clock |
| 中文描述： | 128千位的SPI高速時鐘總線的EEPROM |
| 文件頁數(shù)： | 13/41頁 |
| 文件大?。?/td> | 207K |
| 代理商： | M95128-DW3PP |
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M95128, M95128-W, M95128-R
Instructions
13/41
5
Instructions
Each instruction starts with a single-byte code, as summarized in
Table 3
.
If an invalid instruction is sent (one not contained in
Table 3
), the device automatically
deselects itself.
Table 3.
5.1
Write Enable (WREN)
The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction.
The only way to do this is to send a Write Enable instruction to the device.
As shown in
Figure 5
, to send this instruction to the device, Chip Select (S) is driven Low,
and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then
enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven
High.
Figure 5.
Write Enable (WREN) sequence
Instruction set
Instruction
Description
Instruction Format
WREN
Write Enable
0000 0110
WRDI
Write Disable
0000 0100
RDSR
Read Status Register
0000 0101
WRSR
Write Status Register
0000 0001
READ
Read from Memory Array
0000 0011
WRITE
Write to Memory Array
0000 0010
C
D
AI02281E
S
Q
2
1
3
4
5
6
7
High Impedance
0
Instruction
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M95128-DW3PV | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit Serial SPI bus EEPROM with high speed clock |
| M95128-DW3T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95128-DW3TG | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95128-DW3TG/A | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit serial SPI bus EEPROM with high speed clock |
| M95128-DW3TG/P | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:128 Kbit serial SPI bus EEPROM with high speed clock |
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