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參數(shù)資料
| 型號(hào)： | M95160-DL1T |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | DRAM |
| 英文描述： | 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock |
| 中文描述： | 64/32/16/8千位串行SPI總線的EEPROM高速時(shí)鐘 |
| 文件頁(yè)數(shù)： | 14/40頁(yè) |
| 文件大小： | 648K |
| 代理商： | M95160-DL1T |
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M95160, M95080
14/40
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction al-
lows the Status Register to be read. The Status
Register may be read at any time, even while a
Write or Write Status Register cycle is in progress.
When one of these cycles is in progress, it is rec-
ommended to check the Write In Progress (WIP)
bit before sending a new instruction to the device.
It is also possible to read the Status Register con-
tinuously, as shown in
Figure 9.
.
The status and control bits of the Status Register
are as follows:
WIP bit.
The Write In Progress (WIP) bit indicates
whether the memory is busy with a Write or Write
Status Register cycle. When set to 1, such a cycle
is in progress, when reset to 0 no such cycle is in
progress.
WEL bit.
The Write Enable Latch (WEL) bit indi-
cates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is
set, when set to 0 the internal Write Enable Latch
is reset and no Write or Write Status Register in-
struction is accepted.
BP1, BP0 bits.
The Block Protect (BP1, BP0) bits
are non-volatile. They define the size of the area to
be software protected against Write instructions.
These bits are written with the Write Status Regis-
ter (WRSR) instruction. When one or both of the
Block Protect (BP1, BP0) bits is set to 1, the rele-
vant memory area (as defined in
Table 3.
) be-
comes
protected
against
instructions. The Block Protect (BP1, BP0) bits
can be written provided that the Hardware Protect-
ed mode has not been set.
SRWD bit.
The Status Register Write Disable
(SRWD) bit is operated in conjunction with the
Write Protect (W) signal. The Status Register
Write Disable (SRWD) bit and Write Protect (W)
signal allow the device to be put in the Hardware
Protected mode (when the Status Register Write
Disable (SRWD) bit is set to 1, and Write Protect
(W) is driven Low). In this mode, the non-volatile
bits of the Status Register (SRWD, BP1, BP0) be-
come read-only bits and the Write Status Register
(WRSR) instruction is no longer accepted for exe-
cution.
Write
(WRITE)
Figure 9. Read Status Register (RDSR) Sequence
C
D
S
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15
Instruction
0
AI02031E
Q
7
6
5
4
3
2
1
0
Status Register Out
High Impedance
MSB
7
6
5
4
3
2
1
0
Status Register Out
MSB
7
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| M95160-DL6T | 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95160-DS3 | 16Kbit and 8Kbit Serial SPI Bus EEPROM With High Speed Clock |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M95160-DL3T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95160-DL5T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock |
| M95160-DL6T | 功能描述:電可擦除可編程只讀存儲(chǔ)器 5.5V 16K (2Kx8) RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| M95160-DRDW3TP/K | 功能描述:EEPROM SPI 16KB 8TSSOP 制造商:stmicroelectronics 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:16K（2K x 8） 速度:20MHz 接口:SPI 串行 電壓 - 電源:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 125°C（TA） 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:8-TSSOP 標(biāo)準(zhǔn)包裝:1 |
| M95160-DRDW8TP/K | 功能描述:IC EEPROM 16KB SPI BUS 8TSSOP 制造商:stmicroelectronics 系列:- 包裝:剪切帶（CT） 零件狀態(tài):有效 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:16K（2K x 8） 速度:20MHz 接口:SPI 串行 電壓 - 電源:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 105°C（TA） 封裝/外殼:8-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:8-TSSOP 標(biāo)準(zhǔn)包裝:1 |
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