參數(shù)資料
型號: M95160-VMN5T
廠商: 意法半導體
元件分類: DRAM
英文描述: 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock
中文描述: 64/32/16/8千位串行SPI總線的EEPROM高速時鐘
文件頁數(shù): 5/40頁
文件大?。?/td> 648K
代理商: M95160-VMN5T
5/40
M95160, M95080
SUMMARY DESCRIPTION
These electrically erasable programmable memo-
ry (EEPROM) devices are accessed by a high
speed SPI-compatible bus. The memory array is
organized as 2048 x 8 bit (M95160), and 1024 x 8
bit (M95080).
The device is accessed by a simple serial interface
that is SPI-compatible. The bus signals are C, D
and Q, as shown in
Table 2.
and
Figure 2.
.
The device is selected when Chip Select (S) is tak-
en Low. Communications with the device can be
interrupted using Hold (HOLD).
Figure 2. Logic Diagram
Figure 3. DIP, SO, TSSOP and MLP
Connections (Top View)
Note: See
PACKAGE MECHANICAL
section for package dimen-
sions, and how to identify pin-1.
Table 2. Signal Names
AI01789C
S
VCC
M95xxx
HOLD
VSS
W
Q
C
D
C
Serial Clock
D
Serial Data Input
Q
Serial Data Output
S
Chip Select
W
Write Protect
HOLD
Hold
V
CC
Supply Voltage
V
SS
Ground
D
VSS
C
HOLD
Q
W
S
VCC
AI01790D
M95xxx
1
2
3
4
8
7
6
5
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