參數(shù)資料
型號: M95256-DW3P
廠商: 意法半導(dǎo)體
元件分類: EEPROM
英文描述: 256Kbit and 128Kbit Serial SPI Bus EEPROM With High Speed Clock
中文描述: 256Kbit和128Kbit的EEPROM串行SPI總線高速時鐘
文件頁數(shù): 26/39頁
文件大?。?/td> 580K
代理商: M95256-DW3P
M95256, M95128
26/39
Table 18. AC Characteristics (M95xxx, Device Grade 6)
Note: 1. t
CH
+ t
CL
must never be less than the shortest possible clock period, 1 / f
C
(max)
2. Value guaranteed by characterization, not 100% tested in production.
Test conditions specified in
Table 11.
and
Table 8.
Symbol
Alt.
Parameter
Min.
Max.
Unit
f
C
f
SCK
Clock Frequency
D.C.
10
MHz
t
SLCH
t
CSS1
S Active Setup Time
15
ns
t
SHCH
t
CSS2
S Not Active Setup Time
15
ns
t
SHSL
t
CS
S Deselect Time
40
ns
t
CHSH
t
CSH
S Active Hold Time
25
ns
t
CHSL
S Not Active Hold Time
15
ns
t
CH 1
t
CLH
Clock High Time
40
ns
t
CL 1
t
CLL
Clock Low Time
40
ns
t
CLCH 2
t
RC
Clock Rise Time
1
μs
t
CHCL 2
t
FC
Clock Fall Time
1
μs
t
DVCH
t
DSU
Data In Setup Time
15
ns
t
CHDX
t
DH
Data In Hold Time
15
ns
t
HHCH
Clock Low Hold Time after HOLD not Active
15
ns
t
HLCH
Clock Low Hold Time after HOLD Active
20
ns
t
CHHL
Clock High Set-up Time before HOLD Active
30
ns
t
CHHH
Clock High Set-up Time before HOLD not
Active
30
ns
t
SHQZ 2
t
DIS
Output Disable Time
25
ns
t
CLQV
t
V
Clock Low to Output Valid
25
ns
t
CLQX
t
HO
Output Hold Time
0
ns
t
QLQH 2
t
RO
Output Rise Time
20
ns
t
QHQL 2
t
FO
Output Fall Time
20
ns
t
HHQV
t
LZ
HOLD High to Output Valid
25
ns
t
HLQZ 2
t
HZ
HOLD Low to Output High-Z
25
ns
t
W
t
WC
Write Time
5
ms
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