參數(shù)資料
型號: MAX1002CAX+
廠商: Maxim Integrated Products
文件頁數(shù): 2/12頁
文件大?。?/td> 0K
描述: IC ADC 6BIT 60MSPS DUAL 36-SSOP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 30
位數(shù): 6
采樣率(每秒): 60M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 941mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 36-BSOP(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 36-SSOP
包裝: 管件
輸入數(shù)目和類型: 4 個單端,單極;2 個差分,單極
__________Applications Information
Layout, Grounding, and Bypassing
The MAX1002 is designed with separate analog and
digital power-supply and ground connections to isolate
high-current digital noise spikes from the more sensi-
tive analog circuitry. The high-current digital output
ground (OGND) and analog ground (GND) should be
at the same DC level, connected at only one location
on the board. This provides best noise immunity and
improved conversion accuracy. Use of separate
ground planes is strongly recommended.
The entire board requires good DC bypassing for both
analog and digital supplies. Place the bypass capaci-
tors close to where the power is routed onto the board,
i.e., close to the connector. 10F electrolytic capacitors
with low ESR-ratings are recommended. For best effec-
tive bits performance, minimize capacitive loading at
the digital outputs. Keep the digital output traces as
short as possible.
The MAX1002 can operate with one +5V supply. For
optimum performance, separate +5V ±5% supplies and
bypassing are recommended. Bypass each of the VCC
supply pins to its respective GND with high-
quality ceramic capacitors located as close to the
package as possible (Table 2). Consult the evaluation
kit for a suggested layout and bypassing scheme.
_____________Dynamic Performance
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to all
other ADC output signals. The output spectrum is limit-
ed to frequencies above DC and below one-half the
ADC sample rate.
The theoretical minimum A/D noise is caused by quan-
tization error, and results directly from the ADC’s reso-
lution: SNR = (6.02N + 1.76)dB, where N is the number
of bits of resolution. Therefore, a perfect 6-bit ADC can
do no better than 38dB.
The FFT Plot (see
Typical Operating Characteristics)
shows the result of sampling a pure 20MHz sinusoid at
a 60MHz clock rate. This FFT plot of the output shows
the output level in various spectral bands. The plot has
been averaged to reduce the quantization noise floor
and reveal the low-amplitude spurs. This emphasizes
the excellent spurious-free dynamic range of the
MAX1002.
The effective resolution (or ENOB) the ADC provides
can be measured by transposing the equation that con-
verts resolution to SNR: N = (SINAD - 1.76) / 6.02 (see
Typical Operating Characteristics).
MAX1002
Low-Power, 60Msps, Dual, 6-Bit ADC
10
______________________________________________________________________________________
Table 2. Bypassing
0.01F
Oscillator/Clock
0.01F
Converter
SUPPLY
FUNCTION
0.01F
Analog Inputs
CAPACITOR
VALUE
47pF
Digital I Output
0.01F
Buffer
47pF
Digital Q Output
27
19
11
27
12
BYPASS TO
GND/OGND
7
28
36
8
26
13
VCC /
VCCO
6
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MAX1002CAX+T 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power 60Msps Dual 6-Bit RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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