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參數(shù)資料
| 型號： | MAX1144BEAP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/18頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT 150KSPS 20-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 150k |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 26.4mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SSOP |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 1 個單端，單極；1 個單端，雙極 |
Input Acquisition and Settling
Clocking in a control byte starts input acquisition. The
main capacitor array starts acquiring the input as soon
as a start bit is recognized, using the same input range
as the previous conversion. If the opposite input range
is selected by the second DIN bit, the part immediately
switches to the new sampling mode. Acquisition time is
one-and-a-half clock cycles shorter when switching
from unipolar to bipolar or bipolar to unipolar modes
than when continuously converting in the same mode.
Acquisition can be extended by eight clock cycles by
setting M1 = 1 and M0 = 1 (long acquisition mode). The
sampling instant in short acquisition completes on the
falling edge of the sixth clock cycle after the start bit
(Figure 2). Acquisition is 5 clock cycles in short acquisi-
tion mode and 13 clock cycles in long acquisition
mode. Short acquisition mode is 24 clock cycles per
conversion. Using the external clock to run the conver-
sion process limits unipolar conversion speed to
125ksps instead of 150ksps as in bipolar mode. The
input resistance in unipolar mode is larger than that of
bipolar mode (Figure 1). The RC time constant in unipo-
lar mode is larger than that of bipolar mode, reducing
the maximum conversion rate in 24 external clock
mode. Long acquisition mode with external clock
allows both unipolar and bipolar sampling of 112ksps
as (3.6MHz / 32 clock cycles) by adding eight extra
clock cycles to the conversion.
Most applications require an input buffer amplifier. If
the input signal is multiplexed, the input channel should
be switched immediately after acquisition, rather than
near the end of or after a conversion. This allows more
time for the input buffer amplifier to respond to a large
step change in input signal. The input amplifier must
have a high enough slew rate to complete the required
output voltage change before the beginning of the
acquisition time.
At the beginning of acquisition, the capacitive DAC is
connected to the amplifier output, causing some output
disturbance. Ensure that the sampled voltage has set-
tled to within the required limits before the end of the
acquisition time. If the frequency of interest is low, AIN
can be bypassed with a large enough capacitor to
charge the capacitive DAC with very little change in
voltage. However, for AC use, AIN must be driven by a
wideband buffer (at least 10MHz), which must be sta-
ble with the DAC’s capacitive load (in parallel with any
AIN bypass capacitor used) and also must settle quickly
(Figure 7).
Digital Noise
Digital noise can couple to AIN and REF. The conver-
sion clock (SCLK) and other digital signals that are
active during input acquisition contribute noise to the
conversion result. If the noise signal is synchronous to
the sampling interval, an effective input offset is pro-
duced. Asynchronous signals produce random noise
on the input, whose high-frequency components may
be aliased into the frequency band of interest. Minimize
noise by presenting a low impedance (at the frequen-
cies contained in the noise signal) at the inputs. This
requires bypassing AIN to AGND, or buffering the input
with an amplifier that has a small-signal bandwidth of
several MHz, or preferably both. AIN has a bandwidth
of about 4MHz.
Offsets resulting from synchronous noise (such as the
conversion clock) are canceled by the MAX1144/
MAX1145’s calibration scheme. However, because the
MAX1144/MAX1145
14-Bit ADCs, 150ksps, 3.3V Single Supply
______________________________________________________________________________________
13
4
7
6
2
3
IN
VCC
VEE
0.0033
F
0.1
F
0.1
F
100pF
1k
1k
AIN
Figure 7. AIN Buffer for AC/DC Use
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| V24B48M150BG3 | CONVERTER MOD DC/DC 48V 150W |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX1144-MAX1145 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit ADCs, 150ksps, 3.3V Single Supply |
| MAX1145 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:14-Bit ADCs.150ksps.3.3V Single Supply |
| MAX1145ACAP | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1145ACAP+ | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 150ksps 2.2V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX1145ACAP+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 14-Bit 150ksps 2.2V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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