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參數(shù)資料
| 型號： | MAX115CAX+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DAS SYSTEM 12BIT 36-SSOP |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1,000 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 分辨率（位）： | 12 b |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 電壓電源： | 模擬和數(shù)字 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 36-BSOP（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 36-SSOP |
| 包裝： | 帶卷 (TR) |
Track/Holds
The MAX115/MAX116 feature four simultaneous T/Hs.
Each T/H has two multiplexed inputs. A T-switch input
configuration provides excellent hold-mode isolation.
Allow 600ns acquisition time for 12-bit accuracy.
The T/H aperture delay is typically 10ns. The 500ps
aperture-delay mismatch between the T/Hs allows the
relative phase information of up to four different inputs
to be preserved. Figure 3 shows the equivalent input
circuit, illustrating the ADC’s sampling architecture.
Only one of four T/H stages with its two multiplexed
inputs (CH_A and CH_B) is shown. All switches are in
track configuration for channel A. An internal buffer
charges the hold capacitor to minimize the required
acquisition time between conversions. The analog input
appears as a 10k
resistor in parallel with a 16pF
capacitor for the MAX115 and as a 1M
resistor in par-
allel with a 16pF capacitor for the MAX116.
Between conversions, the buffer input is connected to
channel 1 of the selected track/hold bank. When a
channel is not selected, switches S1, S2, and S3 are
placed in hold mode to improve channel-to-channel
isolation.
Digital Interface
Input data (A0–A3) and output data (D0–D11) are multi-
plexed on a three-state bidirectional interface. This par-
allel I/O can easily be interfaced with a microprocessor
(P) or DSP. CS, WR, and RD control the write and read
operations. CS is the standard chip-select signal, which
enables the controller to address the MAX115/MAX116
as an I/O port. When CS is high, it disables the WR and
RD inputs and forces the interface into a high-Z state.
Figure 4 details the interface timing.
Programming Modes
The MAX115/MAX116 have eight conversion modes
plus power-down, which are programmed through a
bidirectional parallel interface. At power-up, the devices
default to the Input Mux A/Single-Channel Conversion
mode. The user can select between two banks (mux
inputs A or mux inputs B) of four simultaneous-sampled
input channels, as illustrated in Figure 2. An internal
microsequencer can be programmed to convert one to
four channels of the selected bank per sample. For a
single-channel conversion, CH1 is digitized, and then
INT goes low to indicate completion of the conversion.
MAX115/MAX116
2x4-Channel, Simultaneous-Sampling
12-Bit ADCs
_______________________________________________________________________________________
9
CH1
CH2
CH3
CH4
tACQ
tCONV
tAH
tAS
t WR
tCWH
tDH
tDA
tRD
tCRS
tCRH
tRD
tID
tCWS
CONVST
INT
CS
WR
DATA
tCW
DATA IN
RD
Figure 4. Timing Diagram
Figure 5. Programming a Four-Channel Conversion, Input Mux A
A0
(LSB)
WR
CS
A1
A2
A3
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| MAX115EAX | 功能描述:數(shù)據(jù)轉換系統(tǒng) Integrated Circuits (ICs) RoHS:否 制造商:Texas Instruments 轉換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX115EAX+ | 制造商:Maxim Integrated Products 功能描述: |
| MAX115EAX+T | 功能描述:數(shù)據(jù)轉換系統(tǒng) RoHS:否 制造商:Texas Instruments 轉換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX115EAX-T | 功能描述:數(shù)據(jù)轉換系統(tǒng) RoHS:否 制造商:Texas Instruments 轉換速率:0.001 MSPs 分辨率:24 bit 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
| MAX115EVB16 | 功能描述:數(shù)據(jù)轉換 IC 開發(fā)工具 12-Bit 8Ch 116ksps 2.6V Precision ADC RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
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