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參數(shù)資料
| 型號(hào)： | MAX11662AUB+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 15/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 8BIT SRL 500KSPS 10UMAX |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 8 |
| 采樣率（每秒）： | 500k |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 707.3mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬）裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 10-uMAX-EP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸入數(shù)目和類型： | 2 個(gè)單端，單極 |
| 其它名稱： | MAX11662AUB+TDKR |
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22 _____________________________________________________________________________________
MAX11661–MAX11666
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
To remain in normal mode, keep CS low until the falling
edge of the 10th SCLK cycle. Pulling CS high after the
10th SCLK falling edge keeps the part in normal mode.
However, pulling CS high before the 10th SCLK falling
edge terminates the conversion, DOUT goes into high-
impedance mode, and the device enters power-down
mode. See Figure 8.
Power-Down Mode
In power-down mode, all bias circuitry is shut down
drawing typically only 1.3FA of leakage current. To save
power, put the device in power-down mode between
conversions. Using the power-down mode between
conversions is ideal for saving power when sampling the
analog input infrequently.
Entering Power-Down Mode
To enter power-down mode, drive CS high between the
2nd and 10th falling edges of SCLK (see Figure 8). By
pulling CS high, the current conversion terminates and
DOUT enters high impedance.
Exiting Power-Down Mode
To exit power-down mode, implement one dummy con-
version by driving CS low for at least 10 clock cycles
(see Figure 9). The data on DOUT is invalid during this
dummy conversion. The first conversion following the
dummy cycle contains a valid conversion result.
The power-up time equals the duration of the dummy
cycle, and is dependent on the clock frequency. The
power-up time for 500ksps operation (8MHz SCLK) is 2Fs.
Figure 8. Entering Power-Down Mode
Figure 9. Exiting Power-Down Mode
Figure 10. ADC Transfer Function
12345678
910111213141516
HIGH
IMPEDANCE
INVALID
DATA
SCLK
CS
DOUT
INVALID DATA OR HIGH IMPEDANCE
HIGH IMPEDANCE
PULL CS HIGH AFTER THE 2ND AND BEFORE THE 10TH SCLK FALLING EDGE
12
34
56
78
910111213141516N
12
34
56
78
910111213141516
HIGH
IMPEDANCE
HIGH
IMPEDANCE
HIGH
IMPEDANCE
SCLK
CS
DOUT
INVALID DATA (DUMMY CONVERSION)
VALID DATA
FS - 1.5 x LSB
OUTPUT CODE
ANALOG
INPUT (LSB)
111...111
111...110
111...101
0
123
2n-2 2n-1 2n
000...000
000...001
000...010
FULL SCALE (FS):
AIN1/AIN2 = REF (TDFN, MAX)
AIN = VDD (SOT23)
n = RESOLUTION
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MAX11663 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, Low-Power,Serial 12-/10-/8-Bit ADCs |
| MAX11663AUT | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, Low-Power,Serial 12-/10-/8-Bit ADCs |
| MAX11663AUT+ | 制造商:Maxim Integrated Products 功能描述: |
| MAX11663AUT+T | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 500ksps 3.6V Precision ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11664 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:500ksps, Low-Power,Serial 12-/10-/8-Bit ADCs |
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