參數(shù)資料
型號: MAX1246BEPE+
廠商: Maxim Integrated Products
文件頁數(shù): 19/25頁
文件大?。?/td> 0K
描述: IC ADC 12BIT SERIAL 16-DIP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 25
位數(shù): 12
采樣率(每秒): 133k
數(shù)據(jù)接口: MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 842mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 通孔
封裝/外殼: 16-DIP(0.300",7.62mm)
供應(yīng)商設(shè)備封裝: 16-PDIP
包裝: 管件
輸入數(shù)目和類型: 4 個單端,單極;4 個單端,雙極;2 個差分,單極;2 個差分,雙極
MAX1246/MAX1247
+2.7V, Low-Power, 4-Channel,
Serial 12-Bit ADCs in QSOP-16
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX1246); VDD = +2.7V to +5.25V (MAX1247); COM = 0V; fSCLK = 2.0MHz; external clock (50% duty cycle);
15 clocks/conversion cycle (133ksps); MAX1246—4.7F capacitor at VREF pin; MAX1247—external reference, VREF = 2.5V applied
to VREF pin; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CONVERSION RATE
Internal clock, SHDN = FLOAT
5.5
7.5
Internal clock, SHDN = VDD
35
65
Conversion Time (Note 5)
tCONV
External clock = 2MHz, 12 clocks/
conversion
6
s
Track/Hold Acquisition Time
tACQ
1.5
s
Aperture Delay
30
ns
Aperture Jitter
<50
ps
SHDN = FLOAT
1.8
Internal Clock Frequency
SHDN = VDD
0.225
MHz
0.1
2.0
External Clock Frequency
Data transfer only
0
2.0
MHz
ANALOG/COM INPUTS
Unipolar, COM = 0V
0 to VREF
Input Voltage Range, Single-
Ended and Differential (Note 6)
Bipolar, COM = VREF / 2
±VREF / 2
V
Multiplexer Leakage Current
On/off leakage current, VCH_ = 0V or VDD
±0.01
±1
A
Input Capacitance
16
pF
INTERNAL REFERENCE (MAX1246 only, reference buffer enabled)
VREF Output Voltage
TA = +25°C
2.480
2.500
2.520
V
VREF Short-Circuit Current
30
mA
MAX1246_C
±30
±50
MAX1246_E
±30
±60
VREF Temperature Coefficient
MAX1246_M
±30
±80
ppm/°C
Load Regulation (Note 8)
0mA to 0.2mA output load
±0.35
mV
Internal compensation mode
0
Capacitive Bypass at VREF
External compensation mode
4.7
F
Capacitive Bypass at REFADJ
0.047
F
REFADJ Adjustment Range
VBST = VLX = VIN = 28V, VFB = 1.5V
±1.5
%
EXTERNAL REFERENCE AT VREF (Buffer disabled)
VREF Input Voltage Range
(Note 9)
1.0
VDD +
50mV
V
VREF Input Current
VREF = 2.5V
100
150
V
VREF Input Resistance
18
25
k
Shutdown VREF Input Current
0.01
100
A
REFADJ Buffer Disable
Threshold
VDD -
0.5
V
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