MAX1282/MAX1283
300ksps/400ksps, Single-Supply, 4-Channel,
Serial 12-Bit ADCs with Internal Reference
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7
TIMING CHARACTERISTICS—MAX1283
(Figures 1, 2, 5, 6; VDD1 = VDD2 = +2.7V to +3.6V, TA = TMIN to TMAX, unless otherwise noted.)
CLOAD = 20pF
CONDITIONS
ns
100
tCSW
CS Pulse Width High
ns
85
tSTE
CS Fall to SSTRB Enable
ns
85
tDOE
CS Fall to DOUT Enable
ns
13
85
tSTD
CS Rise to SSTRB Disable
ns
13
85
tDOD
CS Rise to DOUT Disable
ns
100
tSTV
SCLK Rise to SSTRB Valid
ns
100
tDOV
SCLK Rise to DOUT Valid
ns
83
tCL
SCLK Pulse Width Low
ns
83
tCH
ns
208
tCP
SCLK Period
SCLK Pulse Width High
ns
13
20
tSTH
SCLK Rise to SSTRB Hold
ns
13
20
tDOH
SCLK Rise to DOUT Hold
ns
45
tCS1
CS Rise to SCLK Rise Ignore
ns
45
tCSO
SCLK Rise to CS Fall Ignore
ns
45
tDS
DIN to SCLK Setup
ns
0
tDH
DIN to SCLK Hold
ns
45
tCSS
CS Fall to SCLK Rise Setup
ns
0
tCSH
SCLK Rise to CS Rise Hold
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
Note 1: Tested at VDD1 = VDD2 = VDD(MIN), COM = GND, unipolar single-ended input mode.
Note 2: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range has
been calibrated.
Note 3: Offset nulled.
Note 4: Ground the “on” channel; sine wave is applied to all “off” channels.
Note 5: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle.
Note 6: The common-mode range for the analog inputs (CH3–CH0 and COM) is from GND to VDD1.
Note 7: External load should not change during conversion for specified accuracy.
Note 8: ADC performance is limited by the converter’s noise floor, typically 300Vp-p. An external reference below 2.5V compro-
mises the performance of the ADC.
Note 9: Electrical characteristics are guaranteed from VDD1(MIN) = VDD2(MIN) to VDD1(MAX) = VDD2(MIN). For operations beyond
this range, see Typical Operating Characteristics. For guaranteed specifications beyond the limits, contact the factory.
Note 10: AIN = midscale, unipolar mode. MAX1282 tested with 20pF on DOUT, 20pF on SSTRB, and fSCLK = 6.4MHz, 0 to 5V.
MAX1283 tested with same loads, fSCLK = 4.8MHz, 0 to 3V.
Note 11: SCLK = DIN = GND, CS = VDD1.
