參數(shù)資料
型號(hào): MAX13035EETE+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 17/18頁(yè)
文件大?。?/td> 0K
描述: IC LEVEL TRANS 6CH 16-TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
邏輯功能: 變換器,雙向
位數(shù): 6
輸入類型: 邏輯
輸出類型: 邏輯
數(shù)據(jù)速率: 100Mbps
通道數(shù): 6
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無(wú)/無(wú)
傳輸延遲(最大): 6.5ns
電源電壓: 2.2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-WQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 16-TQFN-EP(4x4)
包裝: 帶卷 (TR)
MAX13030E–MAX13035E
6-Channel High-Speed Logic-Level Translators
8
_______________________________________________________________________________________
Pin Description
PIN
MAX13030E–MAX13034E
MAX13035E
UCSP
TQFN
UCSP
TQFN
NAME
FUNCTION
A1
4
A1
4
I/O VL3
Input/Output 3. Referenced to VL.
A2
6
A2
6
I/O VCC3
Input/Output 3. Referenced to VCC.
A3
7
A3
7
I/O VCC4
Input/Output 4. Referenced to VCC.
A4
9
A4
9
I/O VL4
Input/Output 4. Referenced to VL.
B1
3
B1
3
I/O VL2
Input/Output 2. Referenced to VL.
B2
5
B2
5
I/O VCC2
Input/Output 2. Referenced to VCC.
B3
8
B3
8
I/O VCC5
Input/Output 5. Referenced to VCC.
B4
10
B4
10
I/O VL5
Input/Output 5. Referenced to VL.
C1
2
C1
2
VL
Logic-Supply Voltage, +1.62V to +3.2V. Bypass VL to GND with
a 0.1F capacitor placed as close as possible to the device.
C2
16
C2
16
VCC
Power-Supply Voltage, +2.2V to +3.6V. Bypass VCC to GND with
a 0.1F ceramic capacitor. For full ESD protection, connect a
1F ceramic capacitor from VCC to GND as close as possible to
the VCC input.
C3
13
C3
13
GND
Ground
C4
11
EN
Enable Input. Drive EN to GND for shutdown mode, or drive EN to
VL or VCC for normal operation.
D1
1
D1
1
I/O VL1
Input/Output 1. Referenced to VL.
D2
15
D2
15
I/O VCC1
Input/Output 1. Referenced to VCC.
D3
14
I/O VCC6
Input/Output 6. Referenced to VCC.
D4
12
I/O VL6
Input/Output 6. Referenced to VL.
C4
11
CLK_RET
Clock Return Output. CLK_RET is the returned signal of a clock
applied to CLK_VL. CLK_RET is referenced to VL.
D3
14
CLK_VCC
Translator Channel for a Clock Applied to VCC
D4
12
CLK_VL
Translator Channel for a Clock Applied to VL
EP
EP
Exposed Paddle. Connect exposed paddle to GND.
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