參數(shù)資料
型號(hào): MAX13055EEWG+T
廠商: Maxim Integrated Products
文件頁數(shù): 3/14頁
文件大小: 0K
描述: IC TRANSLATOR LL 8CH 24WLP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
邏輯功能: 變換器,雙向,開路漏極
位數(shù): 8
輸入類型: 電壓
輸出類型: 電壓
通道數(shù): 8
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
工作溫度: -40°C ~ 85°C
封裝/外殼: 24-WFBGA,WLCSP
供應(yīng)商設(shè)備封裝: 24-WLP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MAX13055EEWG+TDKR
MAX13055E–MAX13058E
Detailed Description
The MAX13055E–MAX13058E 8-channel, bidirectional
level translators provide the level shifting necessary for
100Mbps data transfer in multivoltage systems. The
MAX13055E–MAX13058E are ideally suited for level
translation in systems with 8 channels. Externally
applied voltages, VCC and VL, set the logic levels on
either side of the device. Logic-high signals presented
on the VL side of the device appear as a logic-high sig-
nal on the VCC side of the device and vice versa.
The MAX13055E–MAX13058E operate at full speed
with external drivers that source as little as 4mA output
current. Each I/O channel is pulled up to VCC or VL by
an internal 40A current source, allowing the
MAX13055E–MAX13058E to be driven by either push-
pull or open-drain drivers.
The MAX13055E–MAX13058E feature an enable (EN)
input that places the devices into a low-power shut-
down mode when driven low. The MAX13055E–
MAX13058E feature an automatic shutdown mode that
disables the part when VCC is less than VL. The state of
I/O VCC_ and I/O VL _ during shutdown is chosen by
selecting the appropriate part version (see the
Ordering
Information/Selector Guide).
The MAX13055E–MAX13058E operate with VCC volt-
ages from +2.2V to +3.6V and VL voltages from +1.62V
to +3.2V.
Level Translation
For proper operation, ensure that +2.2V
≤ VCC ≤ +3.6V,
+1.62V
≤ VL ≤ VCC - 0.2V. When power is supplied to
VL while VCC is missing or less than VL, the
MAX13055E–MAX13058E automatically enter a low-
power mode. The devices also enters shutdown mode
when VEN = 0V. This allows VCC to be disconnected
and still have a known state on I/O VL_. The maximum
data rate depends heavily on the load capacitance
(see the Rise/Fall Time vs. Capacitive Load graphs in
the
Typical Operating Characteristics), output imped-
ance of the driver, and the operating voltage range.
Input Requirements
The MAX13055E–MAX13058E architecture is based on
an nMOS pass gate and rise/fall time accelerator stages
(Figure 4). The accelerators are active only when there
is a rising/falling edge on a given I/O. A short pulse is
then generated where the output accelerator stages
become active and charges/discharges the capaci-
tance at the I/Os. Due to its architecture, both input
stages become active during the one-shot pulse. This
can lead to current feeding into the external source that
is driving the translator. However, this behavior helps to
speed up the transition on the driven side.
The MAX13055E–MAX13058E have internal current
sources capable of sourcing 40A to pull up the I/O
lines. These internal pullup current sources allow the
inputs to be driven with open-drain drivers as well as
push-pull drivers. It is not recommended to use external
pullup resistors on the I/O lines. The architecture of the
MAX13055E–MAX13058E permits either side to be dri-
ven with a minimum of 4mA drivers or larger.
ONE-SHOT
I/O VL_
I/O VCC_
VBIAS
ONE-SHOT
RISE/FALL TIME
ACCELERATOR
RISE/FALL TIME
ACCELERATOR
VL
VCC
Figure 4. Simplified Functional Diagram for One I/O Line
1.62V to 3.6V, 8-Channel, High-Speed LLT
______________________________________________________________________________________
11
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