參數(shù)資料
型號: MAX13101EETL+
廠商: Maxim Integrated Products
文件頁數(shù): 6/18頁
文件大?。?/td> 0K
描述: IC TRANSL LOGIC 16CH 40-TQFN
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 60
邏輯功能: 變換器,雙向,3 態(tài)
位數(shù): 16
輸入類型: CMOS
輸出類型: CMOS
數(shù)據(jù)速率: 20Mbps
通道數(shù): 16
輸出/通道數(shù)目: 1
差分 - 輸入:輸出: 無/無
傳輸延遲(最大): 20ns
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-TQFN-EP(5x5)
包裝: 管件
MAX13101E/MAX13102E/
MAX13103E/MAX13108E
16-Channel Buffered CMOS
Logic-Level Translators
14
Maxim Integrated
Multiplexing Input (MULT)
The MAX13108E features a multiplexing input (MULT)
that enables 8 of the 16 channels and places the
remaining 8 into tri-state. Figure 7 depicts a typical mul-
tiplexing configuration using the MAX13108E. Drive
MULT high to enable I/O VCC1 through I/O VCC8 and
I/O VL1 through I/O VL8. Driving MULT high sets
I/O VCC9 through I/O VCC16 and I/O VL9 through I/O
VL16 into tri-state. Drive MULT low to enable I/O VCC9
through I/O VCC16 and I/O VL9 through I/O VL16.
Driving MULT low sets I/O VCC1 through I/O VCC8 and
I/O VL1 through I/O VL8 into tri-state.
±15kV ESD Protection
As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against electrostatic
discharges encountered during handling and assembly.
The I/O VCC_ lines have extra protection against static
discharge. Maxim’s engineers have developed state-of-
the-art structures to protect these pins against ESD of
±15kV without damage. The ESD structures withstand
high ESD in all states: normal operation, tri-state output
mode, and powered down. After an ESD event, Maxim’s
E versions keep working without latchup, whereas com-
peting products can latch and must be powered down
to remove the latchup condition.
ESD protection can be tested in various ways. The
I/O VCC_ lines of the MAX13101E/ MAX13102E/
MAX13103E/MAX13108E are characterized for protec-
tion to ±15kV using the Human Body Model.
RISE-TIME
ACCELERATOR
FALL-TIME
ACCELERATOR
I/O VCC_
I/O VL_
VCC
VL
RISE-TIME
ACCELERATOR
FALL-TIME
ACCELERATOR
MAX13101E
MAX13102E
MAX13103E
MAX13108E
Figure 6. Simplified Diagram (1 I/O Line)
PORT A
PORT B
I/O VL9
I/O VL10
I/O VL11
I/O VL12
I/O VL13
I/O VL14
I/O VL15
I/O VL16
I/O VL3
I/O VL4
I/O VL5
I/O VL6
I/O VL7
I/O VL8
I/O VL1
I/O VL2
I/O VCC1
MULT
I/O VCC2
I/O VCC3
I/O VCC4
I/O VCC5
I/O VCC6
I/O VCC7
I/O VCC8
I/O VCC9
I/O VCC10
I/O VCC11
I/O VCC12
I/O VCC13
I/O VCC14
I/O VCC15
I/O VCC16
MAX13108E
Figure 7. MAX13108E Multiplexing Configuration
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MAX13101EETL+T 功能描述:轉(zhuǎn)換 - 電壓電平 16-Ch 20Mbps 5.5V Logic Level Tr RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8
MAX13101EETL-T 功能描述:轉(zhuǎn)換 - 電壓電平 RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8
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