VID R B A RECEIVER OUTPUT ATE Figure 6. Receiver P" />
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鍨嬭櫉(h脿o)锛� MAX13432EESD+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 2/20闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� TXRX RS-485 0.5MBPS FULL 14SOIC
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 50
椤炲瀷锛� 鏀剁櫦(f膩)鍣�
椹�(q奴)鍕�(d貌ng)鍣�/鎺ユ敹鍣ㄦ暩(sh霉)锛� 1/1
瑕�(gu墨)绋嬶細 RS485
闆绘簮闆诲锛� 3 V ~ 5.5 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 14-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 14-SOIC
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 1408 (CN2011-ZH PDF)
RS-485 Transceivers with Low-Voltage
Logic Interface
VID
R
B
A
RECEIVER
OUTPUT
ATE
Figure 6. Receiver Propagation Delay Test Circuit
A
B
RO
VOH
VL/2
tRPLH
tRPHL
VOL
+1V
-1V
THE RISE TIME AND FALL TIME OF INPUTS A AND B < 4ns
Figure 7. Receiver Propagation Delays
Test Circuits and Waveforms (continued)
S1 OPEN
S2 CLOSED
S3 = +1.5V
RO
VL
0
VOH
VOH/2
S1 OPEN
S2 CLOSED
S3 = +1.5V
tRHZ
VL
0
VOH
0.25V
VL/2
S1 CLOSED
S2 OPEN
S3 = -1.5V
VL
0
VOL
VL
VL/2
S1 CLOSED
S2 OPEN
S3 = -1.5V
tRLZ
VL
0
VOL
VL
0.25V
GENERATOR
VL
+1.5V
1k
CL
15pF
S2
S1
50
S3
-1.5V
R
VID
RE
RO
RE
RO
RE
RO
RE
tRZH, tRZH(SHDN)
tRZL, tRZL(SHDN)
(VOL + VL)/2
VL/2
R
RO
RE
Figure 8. Receiver Enable and Disable Times
MAX13430E鈥揗AX13433E
10
Maxim Integrated
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
LM2901VDTBR2 IC COMP QUAD SGL SUPPLY 14TSSOP
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MC10E1652FNR2 IC COMPARATOR DUAL ECL 20PLCC
MAX13412EESA+ IC TXRX RS-485 LDO/CTRL 8-SOIC
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MAX13432EETD+ 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:LINE TRNSCVR 1TR 1TX 1RX 14TDFN EP - Rail/Tube
MAX13432EETD+T 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC Txrx RS-485 0.5Mbps Full RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube
MAX13433EESD/V+ 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC RS-485 Transceivers with Low-Voltage Logic Interface RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube