- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗10621 > MAX13443EASA+ (Maxim Integrated Products)IC TXRX RS485 HALF DUPLEX 8-SOIC PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MAX13443EASA+ |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩(sh霉)锛� | 9/18闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC TXRX RS485 HALF DUPLEX 8-SOIC |
| 鐢�(ch菐n)鍝佸煿瑷撴ā濉婏細 | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯欐簴鍖呰锛� | 100 |
| 椤炲瀷锛� | 鏀剁櫦(f膩)鍣� |
| 椹�(q奴)鍕曞櫒/鎺ユ敹鍣ㄦ暩(sh霉)锛� | 1/1 |
| 瑕�(gu墨)绋嬶細 | RS422锛孯S485 |
| 闆绘簮闆诲锛� | 4.75 V ~ 5.25 V |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 8-SOIC锛�0.154"锛�3.90mm 瀵級 |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 8-SOIC |
| 鍖呰锛� | 绠′欢 |
| 鐢�(ch菐n)鍝佺洰閷勯爜闈細 | 1408 (CN2011-ZH PDF) |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�鐣跺墠绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�
MAX13442E/MAX13443E/MAX13444E
R1
4.7k
惟
R3
47
惟
C1
2.2nF
C2
2.2nF
R2
4.7k
惟
RO
RX
TX
R4
47
惟
J1708 BUS
A
B
TXD
D
R
DE
RE
MAX13444E
VCC
Figure 14. J1708 Application Circuit (See Tables 2 and 4)
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
鈥�+鈥�, 鈥�#鈥�, or 鈥�-鈥� in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
1
2
3
4
8
5
VCC
GND
TXD
DE
RE
RO
R
D
RT
7
6
D
R
DE
RE
TXD
RO
A
B
1
2
3
4
8
7
6
5
VCC
B
A
GND
TXD
DE
RE
RO
SO
R
D
B
A
MAX13444E
+
Pin Configurations and Typical Operating Circuits (continued)
卤15kV ESD-Protected, 卤80V Fault-Protected,
Fail-Safe RS-485/J1708 Transceivers
______________________________________________________________________________________
17
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 SO
S8+4
鐩搁棞PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| RM12BPE-5PH | CONN PLUG 5POS W/PIN INSERT |
| MAX3440EESA+ | IC TXRX RS-485 8-SOIC |
| TW2836-PA1-GE | IC VIDEO QUAD/MUX CTRLR 4CH |
| MAX3442EESA+ | IC TXRX RS-485 8-SOIC |
| RM12BPE-4S | CONN PLUG 4POS W/SOCKET INSERT |
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| MAX13443EASA+ | 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC Half-Dplx RS-422/485 10Msps 5V LD/Rec RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube |
| MAX13443EASA+T | 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC Half-Dplx RS-422/485 10Msps 5V LD/Rec RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube |
| MAX13443EASA-T | 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube |
| MAX13444EASA | 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube |
| MAX13444EASA/V+ | 鍔熻兘鎻忚堪:RS-485鎺ュ彛IC +/-80V Fault Protected RS-485 Half-Duplex Transceiver with Foldback Current Limit RoHS:鍚� 鍒堕€犲晢:Texas Instruments 鏁�(sh霉)鎿�(j霉)閫熺巼:250 Kbps 宸ヤ綔闆绘簮闆诲:3.3 V 闆绘簮闆绘祦:750 uA 宸ヤ綔婧害鑼冨湇:- 40 C to + 125 C 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:SOIC-8 灏佽:Tube |
鐧�(f膩)甯冪穵鎬ラ噰璩硷紝3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京銆�
