參數(shù)資料
型號(hào): MAX1379EVKIT+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 9/25頁(yè)
文件大?。?/td> 0K
描述: EVAL KIT FOR MAX1379
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
ADC 的數(shù)量: 2
位數(shù): 12
采樣率(每秒): 1.25M
數(shù)據(jù)接口: 串行
輸入范圍: ±VREF/2
在以下條件下的電源(標(biāo)準(zhǔn)): 85.5mW @ 1.25MSPS
工作溫度: -40°C ~ 125°C
已用 IC / 零件: MAX1379
已供物品: 板,CD
MAX1377/MAX1379/MAX1383
Dual, 12-Bit, 1.25Msps Simultaneous-Sampling
ADCs with Serial Interface
______________________________________________________________________________________
17
The internal reference is continuously powered-up dur-
ing both normal and partial power-down modes. In full
power-down mode, the internal reference is disabled.
Allow at least 2ms recovery time after a power-on reset
or exiting full power-down mode for the reference to
settle to its intended value.
Input Voltage Range (MAX1383)
The input range on the MAX1383 has an 8x relationship
with the reference voltage. For example, when the refer-
ence voltage (internal or external) is 2.5V, the input
range is ±10V (20VP-P).
External Reference Mode
Drive REFSEL high to select external reference mode.
Apply a reference voltage at REF. Bypass REF with
a 10nF capacitor and a 4.7F capacitor to RGND. As
with the internal reference, it is important to select a low
ESR capacitor and keep the trace resistance as low
as possible.
Serial Interface
Initialization After Power-Up
Upon initial power-up, the MAX1377/MAX1379/ MAX1383
require a complete conversion cycle to initialize the inter-
nal calibration. Following this initialization, the ADC is
ready for normal operation. This initialization is only
required after a hardware power-on reset and is not
required after exiting partial or full power-down mode.
Starting a Conversion and Reading the Output
With SCLK idling high or low, a falling edge on CNVST
begins a conversion (see Figure 6). This causes the
analog input stage to transition from track to hold
mode. SCLK provides the timing for the conversion
process, and data is shifted out as each bit of the result
is determined. A rising edge in CNVST forces the
device into one of three modes. The mode is deter-
mined by the clock cycle in which the transition occurs
and whether the device is set for single or dual outputs.
Figures 7 and 8 show each mode that is activated with
a rising CNVST edge for single and dual outputs.
CNVST
SCLK
DOUT_
tSETUP
tCL
tCH
tDHOLD
tDOUT
tCSW
CS
tACQ
D11
D10
D9
D8
D7
D6
D5
D4
D3
14
13
1
tCST
TRACKING
HOLD MODE
INTERNAL T/H STATE
D2
D1
D0
Figure 6. Detailed Serial-Interface Timing Diagram
CNVST
SCLK
1
2
3
4
14
28
POWER-DOWN
CONTINUOUS MODE
DOUT1 GOES HI-Z
DOUT1 HI-Z
29
CS
Figure 7. Single-Output CNVST Transition Modes
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MAX1379EVKIT+ 功能描述:數(shù)據(jù)轉(zhuǎn)換 IC 開(kāi)發(fā)工具 MAX1379 Eval Kit RoHS:否 制造商:Texas Instruments 產(chǎn)品:Demonstration Kits 類型:ADC 工具用于評(píng)估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V
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MAX1385AETM 制造商:Maxim Integrated Products 功能描述:12-BIT MULTI-CH ADC WITH MULTICH DA - Rail/Tube
MAX1385AETM+ 制造商:Maxim Integrated Products 功能描述: