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參數(shù)資料
| 型號： | MAX1452EAE+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 11/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SENSOR SIGNAL COND 16-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 信號調(diào)節(jié)器 |
| 輸入類型： | 模擬 |
| 輸出類型： | 模擬 |
| 接口： | 串行 |
| 電流 - 電源： | 2.5mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SSOP |
| 包裝： | 帶卷 (TR) |
MAX1452
Low-Cost Precision Sensor
Signal Conditioner
19
Maxim Integrated
Table 9. Control Location (CL[15:0])
FIELD
NAME
DESCRIPTION
15:8
CL[15:8]
Reserved
7:0
CL[7:0]
Control Location. Secure-Lock is activated by setting this to FFhex which disables DIO serial
communications and connects OUT to PGA output.
Table 10. IRSA Decoding
IRSA[3:0]
DESCRIPTION
0000
Write IRSD[3:0] to DHR[3:0] (data hold register)
0001
Write IRSD[3:0] to DHR[7:4] (data hold register)
0010
Write IRSD[3:0] to DHR[11:8] (data hold register)
0011
Write IRSD[3:0] to DHR[15:12] (data hold register)
0100
Reserved
0101
Reserved
0110
Write IRSD[3:0] to ICRA[3:0] or IEEA[3:0], (internal calibration register address or internal EEPROM address
nibble 0)
0111
Write IRSD[3:0] to IEEA[7:4] (internal EEPROM address, nibble 1)
1000
Write IRSD[3:0] to IRSP[3:0] or IEEA[9:8], (interface register set pointer where IRSP[1:0] is IEEA[9:8])
1001
Write IRSD[3:0] to CRIL[3:0] (command register to internal logic)
1010
Write IRSD[3:0] to ATIM[3:0] (analog timeout value on read)
1011
Write IRSD[3:0] to ALOC[3:0] (analog location)
1100 to 1110
Reserved
1111
Write IRSD[3:0] = 1111bin to relearn the baud rate
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