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參數(shù)資料
| 型號(hào)： | MAX14764ETA+T |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 3/13頁(yè) |
| 文件大小： | 0K |
| 描述： | IC ANALOG SWITCH |
| 產(chǎn)品培訓(xùn)模塊： | Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 電路： | 2 x SPST |
| 導(dǎo)通狀態(tài)電阻： | 20 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 3 V ~ 5.5 V |
| 電流 - 電源： | 4.1mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 10-WFDFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 10-TDFN-EP（3x3） |
| 包裝： | 帶卷 (TR) |
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11
MAX14760/MAX14762/MAX14764
Above- and Below-the-Rails
Low-Leakage Analog Switches
Pin Description (continued)
Detailed Description
The MAX14760/MAX14762/MAX14764 analog switches
are capable of handling signals above and below their
rails. These devices operate from a single +3.0V to +5.5V
supply and support signals in the -25V to +25V range.
Integrated Bias Generation
The MAX14760/MAX14762/MAX14764 contain a total of
three charge pumps to generate bias voltages for the
internal switches: a 5V regulated charge pump, a posi-
tive high-voltage (+35V) charge pump, and a negative
high-voltage (-27V) charge pump. When VDD is above
4.7V (typ), the 5V regulated charge pump is bypassed,
and VDD provides the input for the high-voltage charge
pumps, reducing overall supply current. An external
0.1FF capacitor is required for each high-voltage charge
pump between VP/VN and GND.
Analog Signal Range
The devices switch signals in the range from -25V to
+25V that are above and below their rails. The on-resis-
tance for these devices exhibits a high degree of flatness
(58mI) over the whole input voltage range of -25V to
+25V. The analog switches allow bidirectional current
flow, so A, A1, A2, B, B1, B2, and COM, can be used as
either inputs or outputs.
Bypass Capacitors
Bias-stabilizing capacitors are required on the VP and VN
pins. 1FF ceramic capacitors are suggested for effective
operation. VP and VN are not intended as a power supply
for other circuitry.
Applications Information
Nonpowered Condition
The MAX14760/MAX14762/MAX14764 can tolerate input
voltages on the A, B, or COM pins in the ±25V range when
it is not powered. When VDD = 0V, the DC input leakage
current into the A, B, or COM pins is typically below 1μA.
Some devices can have a larger leakage current up to the
mA range due to technology spread.
With VDD not powered, internal diodes between the analog
pins and the VP and VN will charge up the external capaci-
tors on VP and VN when positive and/or negative voltages
are applied to these pins. This causes transient input cur-
rent flow.
Large dv/dt on the inputs causes large capacitive charg-
ing currents, which have to be limited to 300mA to avoid
destroying the internal diodes. Hence, the 100nF capaci-
tors on VP and VN, the dv/dt must be limited to 3V/μs. Once
the capacitors reach their final voltage the input current
decays to the leakage current levels mentioned above.
PIN
NAME
FUNCTION
MAX14760 MAX14762 MAX14764
—
3
—
B1
Analog Switch 1 Common Terminal
—
6
5
A2
Analog Switch 2 Normally Open Terminal
—
5
—
B2
Analog Switch 2 Common Terminal
—
10
—
EN1
Switch 1 Control Input. Drive EN1 high to open switch 1 or drive EN1 low to
close switch 1.
—
9
—
EN2
Switch 2 Control Input. Drive EN2 high to close switch 2 or drive EN2 low to
open switch 2.
—
8
SEL
Switch Control Input. Drive SEL low to connect the COM terminal to A1 or drive
SEL high to connect the COM terminal to A2.
—
EP
Exposed Pad. Connect EP to VN; EP is not intended as an electrical
connection.
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