參數(shù)資料
型號: MAX1480AEPI
廠商: Maxim Integrated Products
文件頁數(shù): 10/21頁
文件大?。?/td> 0K
描述: IC TXRX RS485/422 250KBPS 28-DIP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 14
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: RS422,RS485
電源電壓: 4.5 V ~ 5.5 V
安裝類型: 通孔
封裝/外殼: 28-DIP(0.600",15.24mm)
供應(yīng)商設(shè)備封裝: 28-PDIP
包裝: 管件
MAX1480A/B/C,
MAX1490A/B
Complete, Isolated RS-485/RS-422
Data Interface
18
______________________________________________________________________________________
Driver Output Protection
There are two mechanisms to prevent excessive output
current and power dissipation caused by faults or by
bus contention. A foldback current limit on the output
stage provides immediate protection against short cir-
cuits over the entire common-mode range (see the
Typical Operating Characteristics). In addition, a ther-
mal shutdown circuit forces the driver outputs into a
high-impedance state if the die temperature rises
excessively.
Propagation Delay Skew
Typical propagation delays are shown in the
Typical
Operating Characteristics using the test circuit of
Figure 5. Propagation delay skew is simply the differ-
ence between the low-to-high and high-to-low propaga-
tion delay. Small driver/receiver skew times help
reduce EMI and reflections by maintaining balanced
differential signals.
The receiver skew time,
I tPLH - tPHL I, is typically under
100ns for the MAX1480A/MAX1490A and under 1s for
the MAX1480B/MAX1480C/MAX1490B.
The driver skew time is typically 25ns for the
MAX1480A/MAX1490A and 100ns for the MAX1480B/
MAX1480C/MAX1490B.
___________Applications Information
DI and DE are intended to be driven through a
series current-limiting resistor. Directly grounding
these pins destroys the device.
The MAX1480A/MAX1480B/MAX1480C are designed
for bidirectional data communications on multipoint
bus-transmission lines. The MAX1490A/MAX1490B are
designed for full-duplex bidirectional communications
that are primarily point-to-point. Figures 13 and 14
show half-duplex and full-duplex typical network appli-
cation circuits, respectively. To minimize reflections,
terminate the line at both ends with its characteristic
impedance, and keep stub lengths off the main line as
short as possible. The slew-rate-limited MAX1480B/
MAX1480C/MAX1490B are more tolerant of imperfect
termination and stubs off the main line.
Layout Considerations
The MAX1480A/MAX1480B/MAX1480C/MAX1490A/
MAX1490B pinouts enable optimal PC board layout by
minimizing interconnect lengths and crossovers.
For maximum isolation, the “isolation barrier” should
not be breached except by the MAX1480A/
MAX1480B/MAX1480C/MAX1490A/MAX1490B.
SHIELD (OPTIONAL)
NOTE: RESISTORS R5 AND R6 PROTECT
THE MAX1490A/B FROM TRANSIENT
CURRENTS BETWEEN SHIELD AND
TRANSMISSION LINES.
120
Ω
120
Ω
120
Ω
A
B
Z
Y
Z
R3
R4
R5, 100
Ω
SH1
SH2
R1
R2
R6, 100
Ω
DI
VIN
5V
22
μF
0.1
μF
C1
C2
MAX1490A/B
LOGIC GROUND
ISOLATION BARRIER
ISOLATED COMMON
DRIVER INPUT
RECEIVER OUTPUT
DI
RO
74HC86
OR EQUIVALENT
SHIELD (OPTIONAL)
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
AC1 (MAKE NO CONNECTION)
AC2 (MAKE NO CONNECTION)
ISO VCC1
ISO RO DRV
D2
D1
VCC2
VCC1
A
B
Z
Y
VCC3
SD
FS
GND1
16
15
14
13
9
10
11
12
ISO COM1
ISO DI DRV
ISO VCC2
ISO RO LED
GND2
RO
VCC4
DI
MAX845
MAX488 MAX490
D
DI
RO
120
Ω
B
A
R
Figure 14. Typical Full-Duplex RS-485/RS-422 Network
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