參數(shù)資料
型號(hào): MAX1542ETP
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: TFT LCD DC-to-DC Converter with Operational Amplifiers
中文描述: 1.8 A SWITCHING REGULATOR, 1400 kHz SWITCHING FREQ-MAX, PQCC20
封裝: 5 X 5 MM, 0.8 MM HEIGHT, EXPOSED PAD, TQFN-20
文件頁數(shù): 3/20頁
文件大小: 506K
代理商: MAX1542ETP
M
TFT LCD DC-to-DC Converter with
Operational Amplifiers
_______________________________________________________________________________________
3
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 3V, V
SUP
= 8V, V
SRC
= 28V, FREQ = IN (MAX1543), PGND = AGND = 0,
T
A
= 0
°
C to +85
°
C
, typical values at T
A
= +25
°
C,
unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
-40
75
TYP
MAX
+40
280
UNITS
nA
μS
V/V
m
μA
A
FB Input Bias Current
FB Transconductance
FB Voltage Gain
LX On-Resistance
LX Leakage Current
LX Current Limit
Current-Sense Transresistance
V
FB
= 1.5V
I
COMP
= 5μA
FB to COMP
160
700
210
0.01
1.5
0.50
14
13
14
I
LIM
/ 8
R
LX(ON)
I
LX
I
LIM
400
20
1.8
0.65
V
LX
= 13V
V
FB
= 1V, duty cycle = 65%
1.2
0.30
MAX1542
FREQ = AGND
FREQ = IN
Soft-Start Period
t
SS
MAX1543
ms
Soft-Start Step Size
OPERATIONAL AMPLIFIERS
SUP Supply Range
SUP Supply Current
Input Offset Voltage
Input Bias Current
A
V
SUP
I
SUP
V
OS
I
BIAS
4.5
13.0
1.9
12
±50
V
Buffer configuration, V
POS_
= 4V, no load
V
CM
= V
SUP
/2, T
A
= +25
°
C
NEG1, NEG2, POS1, POS2
1.3
0
+1
mA
mV
nA
Input Common-Mode Voltage
Range
V
CM
0
V
SUP
V
Common-Mode Rejection Ratio
Open-Loop Gain
CMRR
0
V
NEG_
, V
POS_
V
SUP
50
90
125
dB
dB
I
OUT_
= 100μA
V
SUP
-
15
V
SUP
-
2
Output Voltage Swing High
V
OH
I
OUT_
= 5mA
V
SUP
-
150
V
SUP
-
80
mV
I
OUT_
= -100μA
I
OUT_
= -5mA
2
80
150
140
15
150
Output Voltage Swing Low
V
OL
mV
Source
Sink
50
50
Short-Circuit Current
To V
SUP
/2
mA
Output Source-and-Sink Current
Buffer configuration, V
POS_
= 4V,
|
V
OS|
< 10mV
40
mA
Power-Supply Rejection Ratio
PSRR
DC, 6V
V
SUP
13V, V
NEG_
, V
POS_
=
V
SUP
/2
60
100
dB
Slew Rate
7.5
V/μs
-3dB Bandwidth
R
L
= 10k
, C
L
=10pF, buffer configuration
12
MHz
Gain-Bandwidth Product
GBW
Buffer configuration
8
MHz
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
DEL Capacitor Charge Current
During startup, V
DEL
= 1V
4
5
6
μA
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