參數(shù)資料
型號: MAX1549ETL+T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 穩(wěn)壓器
英文描述: Dual, Interleaved, Fixed-Frequency Step-Down Controller with a Dynamically Adjustable Output
中文描述: 3 A DUAL SWITCHING CONTROLLER, 450 kHz SWITCHING FREQ-MAX, QCC40
封裝: 6 X 6 MM, 0.80 MM HEIGHT, MO-220WJJD-2, TQFN-40
文件頁數(shù): 26/35頁
文件大?。?/td> 933K
代理商: MAX1549ETL+T
MAX1549
Active Bus Termination (OUT1)
Active-bus-termination power supplies generate a voltage
rail that tracks a set reference. They are required to
source and sink current. DDR memory architecture
requires active bus termination. In DDR memory architec-
ture, the termination voltage is set at exactly 1/2 the mem-
ory supply voltage. Configure the main MAX1549
controller (OUT1) to generate the termination voltage
using a resistive voltage-divider at REFIN. In such an
application, OUT1 must be kept in PWM mode (SKIP =
VCC or open) for it to source and sink current. Figure 9
shows OUT1 configured as a DDR termination regulator.
Connect GATE and FBLANK to GND when unused.
Voltage Positioning
Powering new mobile processors (CPU or GPU)
requires careful attention to detail to reduce cost, size,
and power dissipation. As processors consume more
power, it was recognized that even the fastest DC-DC
converters were inadequate to handle the severe tran-
sient power requirements. After a load transient, the
output instantly changes by ESRCOUT x
ILOAD.
Conventional DC-DC converters respond by regulating
the output voltage back to its nominal state after the
load transient occurs (Figure 11), but the processor
only requires that the output voltage remains above a
specified minimum value. Dynamically positioning the
output voltage to this lower limit allows the use of fewer
output capacitors and reduces the power consumption
under load.
Figure 10 shows the connection of OUT_ and FB_ in volt-
age-positioned and nonvoltage-positioned circuits. In
nonvoltage-positioned circuits, the MAX1549 regulates
the voltage across the output capacitor. In voltage-posi-
tioned circuits, the MAX1549 regulates the voltage on the
inductor side of the current-sense resistor. The voltage-
positioned output voltage is reduced to:
VOUT(VPS) = VOUT(NO LOAD) - RSENSEILOAD
For a conventional (nonvoltage-positioned) circuit, the
peak-to-peak voltage change is:
VOUT(CONV) = 2 x (ESRCOUT x ILOAD) + VSAG
+ VSOAR
where VSAG and VSOAR are defined in Figure 11.
Setting the converter to regulate at a lower voltage
when under load allows a larger voltage step when the
output current suddenly decreases. Therefore, the
peak-to-peak voltage change for a voltage-positioned
circuit is:
VOUT(VPS) = (ESRCOUT x ILOAD) + VSAG + VSOAR
where VSAG and VSOAR are defined in the Design
Procedure section. Since the amplitudes are the same
for both circuits (
VOUT(CONV) = VOUT(VPS)), the volt-
age-positioned circuit tolerates twice the ESR. Since
the ESR specification is achieved by paralleling several
capacitors, fewer units are needed for the voltage-posi-
tioned circuit.
Dual, Interleaved, Fixed-Frequency Step-Down
Controller with a Dynamically Adjustable Output
32
______________________________________________________________________________________
MAX1549
C2
VOLTAGE-POSITIONED
OUTPUT (VOUT(VPS))
COUT
INPUT (VIN)
+5V BIAS
SUPPLY
DBST
CBST
L1
RSENSE
NH
NL
CIN
VCC
VDD
FB
VOUT(VPS) = VOUT(NO LOAD) - RSENSE x IOUT
CSL
OUT
CSH
GND
DL
DH
BST
V+
C1
R1
LX
DL
REGULATED VOLTAGE
Figure 10. Voltage-Positioned Applications Circuit
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