參數(shù)資料
型號: MAX198BEWI+T
廠商: Maxim Integrated Products
文件頁數(shù): 11/16頁
文件大?。?/td> 0K
描述: IC DAS 12BIT 6CH 28-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
類型: 數(shù)據(jù)采集系統(tǒng)(DAS)
分辨率(位): 12 b
采樣率(每秒): 100k
數(shù)據(jù)接口: 并聯(lián)
電壓電源: 單電源
電源電壓: 4.75 V ~ 5.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 帶卷 (TR)
Input Capacitance
MAX196/MAX198
Multirange, Single +5V, 12-Bit DAS
with 12-Bit Bus Interface
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V ±5%; unipolar/bipolar range; external reference mode, VREF = 4.096V; 4.7F at REF pin; external clock, fCLK = 2.0MHz
with 50% duty cycle; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25°C.)
V
2.4
4.18
Input Voltage Range
A
400
Input Current
VREF =
4.18V
1
V
VDD - 50mV
REFADJ Threshold for
Buffer Disable
Normal, or STANDBY power-down mode
k
10
Input Resistance
FULL power-down mode
5
M
Normal, or STANDBY
power-down mode
FULL power-down mode
Internal acquisition
3.0
5.0
External reference = 4.096V
After FULLPD or STBYPD
External acquisition (Note 9)
CONDITIONS
FULL power-down mode (Note 7)
5
s
3.0
tACQI
Acquisition Time
LSB
±0.1
±1/2
PSRR
Power-Supply Rejection Ratio
(Note 8)
3.0
tACQE
External CLK
s
V
4.75
5.25
VDD
Supply Voltage
6.0
tCONV
Conversion Time
Internal CLK, CCLK = 100pF
6.0
7.7
10.0
To 0.1mV REF bypass
capacitor fully discharged
ms
8
Reference Buffer Settling
60
120
60
Normal mode, bipolar ranges
700
850
Normal mode, unipolar ranges
UNITS
MIN
TYP
MAX
SYMBOL
PARAMETER
STANDBY power-down mode
mA
18
IDD
Supply Current
610
A
Internal reference
±1/2
CCLK = 100pF
MHz
1.25
1.56
2.00
fCLK
Internal Clock Frequency
0.1
2.0
fCLK
External Clock Frequency Range
MHz
External CLK
Internal CLK
Power-up (Note 10)
s
200
Bandgap Reference
Start-Up Time
External CLK
ksps
100
Throughput Rate
Internal CLK, CCLK = 100pF
62
CREF = 4.7F
CREF = 33F
CIN
15
pF
(Note 5)
Input Leakage Current
IIN
±10
A
VIN = 0V or VDD
Input Low Voltage
VINL
0.8
V
Input High Voltage
VINH
2.4
V
POWER REQUIREMENTS
TIMING
REFERENCE INPUT (buffer disabled, reference input applied to REF pin)
DIGITAL INPUTS (D7–D0, CLK, RD, WR, CS) (Note 11)
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