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M
2.4GHz Monolithic Voltage-Controlled
Oscillator with Differential Outputs
4
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Detailed Description
Oscillator
The MAX2753 VCO is implemented as an LC oscillator
topology, integrating all of the tank components on-
chip. This fully monolithic approach provides an
extremely easy-to-use VCO, equivalent to a VCO mod-
ule. The frequency is controlled by a voltage applied to
the TUNE pin, which is internally connected to the var-
actor. The VCO core uses a differential topology to pro-
vide a stable frequency versus supply voltage and
improve the immunity to load variations. In addition,
there is a differential buffer amplifier following the oscil-
lator core to provide added isolation from load varia-
tions and to boost the output power.
Output Buffer
The oscillator signal from the core drives a differential
output buffer amplifier. Each of the two amplifier out-
puts is internally matched to 50
including an on-chip
DC-blocking capacitor. No external DC-blocking
capacitor is required, eliminating the need for any
external components. The amplifier boosts the oscillator
signal to a level suitable for driving most RF mixers.
Applications Information
Tune Input
The tuning input is typically connected to the output of
the PLL loop filter. The loop filter provides an appropri-
ately low-impedance source. The input may incorporate
an extra RC filter stage to reduce high-frequency noise
and spurious signals. Any excess noise on the tuning
input is directly translated into FM noise, which can
degrade the phase-noise performance of the oscillator.
Therefore, it is important to minimize the noise intro-
duced on the tuning input. A simple RC filter with low
corner frequency is needed during testing to filter the
noise present on the voltage source driving the tuning
line.
Layout Issues
Always use controlled impedance lines (microstrip,
coplanar waveguide, etc.) for high-frequency signals.
Always place decoupling capacitors as close to the
V
CC
pins as possible; for long V
CC
lines, it may be nec-
essary to add additional decoupling capacitors located
further from the device. Always provide a low-induc-
tance path to ground, and keep GND vias as close to
the device as possible. Thermal reliefs on GND pads
are not recommended.
Pin Description
PIN
NAME
FUNCTION
1
BYP
VCO Bypass. Bypass with a 0.1μF capacitor to GND.
2
TUNE
Oscillator Frequency Tuning Voltage Input. High-impedance input with a voltage input range of +0.4V
(low frequency) to +2.4V (high frequency).
3
GND
Ground Connection for Oscillator and Biasing. Requires a low-inductance connection to the circuit
board ground plane.
4
SHDN
Shutdown Logic Input. A high-impedance input logic level low disables the device and reduces
supply current to less than 1.0μA. A logic level high enables the device.
5
OUTP
Positive Buffered Oscillator Output. Incorporates an internal DC blocking capacitor. OUTP is internally
matched to 50
.
6
V
CC
DC Supply Voltage Connection. Bypass with a 220pF capacitor to GND for best high frequency
performance.
7
OUTN
Negative Buffered Oscillator Output. Incorporates an internal DC blocking capacitor. OUTN is
internally matched to 50
.
8
GND
Ground Connection for Output Buffer. Requires a low-inductance connection to the circuit board
ground plane.