參數資料
型號: MAX3000A
廠商: Altera Corporation
英文描述: Programmable Logic Device Family
中文描述: 可編程邏輯器件系列
文件頁數: 7/42頁
文件大?。?/td> 649K
代理商: MAX3000A
Altera Corporation
7
MAX 3000A Programmable Logic Device Family Data Sheet
For registered functions, each macrocell flipflop can be individually
programmed to implement D, T, JK, or SR operation with programmable
clock control. The flipflop can be bypassed for combinatorial operation.
During design entry, the designer specifies the desired flipflop type; the
Altera development system software then selects the most efficient
flipflop operation for each registered function to optimize resource
utilization.
Each programmable register can be clocked in three different modes:
Global clock signal mode, which achieves the fastest clock–to–output
performance.
Global clock signal enabled by an active–high clock enable. A clock
enable is generated by a product term. This mode provides an enable
on each flipflop while still achieving the fast clock–to–output
performance of the global clock.
Array clock implemented with a product term. In this mode, the
flipflop can be clocked by signals from buried macrocells or I/ O pins.
Two global clock signals are available in MAX 3000A devices. As shown
in
Figure1
, these global clock signals can be the true or the complement of
either of the two global clock pins,
GCLK1
or
GCLK2
.
Each register also supports asynchronous preset and clear functions. As
shown in
Figure2
, the product–term select matrix allocates product terms
to control these operations. Although the product–term–driven preset
and clear from the register are active high, active–low control can be
obtained by inverting the signal within the logic array. In addition, each
register clear function can be individually driven by the active–low
dedicated global clear pin (
GCLRn
).
Expander Product Terms
Although most logic functions can be implemented with the five product
terms available in each macrocell, highly complex logic functions require
additional product terms. Another macrocell can be used to supply the
required logic resources. However, the MAX 3000A architecture also
offers both shareable and parallel expander product terms (“expanders”)
that provide additional product terms directly to any macrocell in the
same LAB. These expanders help ensure that logic is synthesized with the
fewest possible logic resources to obtain the fastest possible speed.
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相關代理商/技術參數
參數描述
MAX-3000A 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family
MAX3000A_06 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family
MAX3000E 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:+1.2V to +5.5V, 【15kV ESD-Protected, 0.1レA, 35Mbps, 8-Channel Level Translators
MAX3000E_08 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:+1.2V to +5.5V, ±15kV ESD-Protected, 0.1μA, 35Mbps, 8-Channel Level Translators
MAX3000EEBP 制造商:Maxim Integrated Products 功能描述:+1.2V TO +5.5V +/-15KV ESD-PROTECT - Rail/Tube 制造商:Rochester Electronics LLC 功能描述: