參數(shù)資料
型號(hào): MAX301ESE+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH DUAL SPST 16SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
功能: 開(kāi)關(guān)
電路: 2 x SPST - NO
導(dǎo)通狀態(tài)電阻: 35 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 10 V ~ 30 V,±4.5 V ~ 20 V
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 帶卷 (TR)
MAX301/MAX303/MAX305
________________________________________________________________________________________ 5
Precision, Dual, High-Speed Analog Switches
____________________Pin Descriptions
__________Applications Information
Operation with Supply Voltages
Other than ±15V
The MAX301/MAX303/MAX305 switches operate with
±4.5V to ±20V bipolar supplies and a +10V to +30V sin-
gle supply. In either case, analog signals ranging from V+
to V- can be switched. The
Typical Operating
Characteristics graphs show the typical on-resistance
variation with analog signal and supply voltage. The usual
on-resistance temperature coefficent is 0.5%/°C (typ).
Logic Inputs
The MAX301/MAX303/MAX305 operate with a single pos-
itive supply or with bipolar supplies. The devices maintain
TTL compatibility with supplies anywhere in the ±4.5V to
±20V range as long as VL = +5V. If VL is connected to V+
or another supply at voltages other than +5V, the devices
will operate at CMOS-logic level inputs.
Overvoltage Protection
Proper power-supply sequencing is recommended for all
CMOS devices. It is important not to exceed the absolute
maximum ratings because stresses beyond the listed rat-
ings may cause permanent damage to the devices.
Always sequence V+ on first, followed by VL, V-, and
logic inputs. If power-supply sequencing is not possible,
add two small signal diodes in series with the supply pins
for overvoltage protection (Figure 1). Adding diodes
reduces the analog signal range to 1V below V+ and 1V
below V-, but low switch resistance and low leakage char-
acteristics are unaffected. Device operation is
unchanged, and the difference between V+ to V- should
not exceed +44V.
DIP/SO
NAME
FUNCTION
1, 8
COM1,
COM2
Drain (Analog Signal)
2-7
N.C.
Not internally connected
9, 16
NC1,
NC2
Source (Analog Signal)
10, 15
IN2, IN1
Digital Logic Inputs
11
V+
Positive Supply-Voltage
Input—connected to
substrate
12
VL
Logic Supply-Voltage Input
13
GND
Negative Supply Voltage
Input
14
V-
2, 10
1, 3-9, 11,
16
5, 7, 12,
20
13, 19
14
15
17
18
Ground
LCC
NAME
FUNCTION
1, 8, 3, 6
2, 4, 8, 10
COM_
Drain (Analog Signal)
2-7
1, 3, 6, 9,
11, 16
N.C.
Not internally connected
11
14
V+
Positive Supply-Voltage
Input—connected to
substrate
12
15
VL
Logic Supply-Voltage Input
13
17
GND
Ground
14
18
V-
Negative Supply Voltage
Input
15, 10
19, 13
IN1, IN2
Digital Logic Inputs
16, 9, 5, 4
5, 7, 12,
20
NC_,
NO_
Source (Analog Signal)
LCC
NAME
FUNCTION
1, 8, 3, 6
2, 4, 8, 10
COM_
Drain (Analog Signal)
2-7
1, 3, 6, 9,
11, 16
N.C.
Not internally connected
11
14
V+
Positive Supply-Voltage
Input—connected to
substrate
12
15
VL
Logic Supply-Voltage Input
13
17
GND
Ground
14
18
V-
Negative Supply Voltage
15, 10
19, 13
IN1, IN2
Digital Logic Inputs
16, 9, 5, 4
5, 7, 12,
20
NO_
Source (Analog Signal)
Vg
NO_
V+
COM_
V-
Figure 1. Overvoltage Protection Using Blocking Diodes
MAX301 PIN
LCC
MAX303 PIN
DIP/SO
MAX305 PIN
DIP/SO
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