參數(shù)資料
型號: MAX3045BEWE+T
廠商: Maxim Integrated Products
文件頁數(shù): 13/15頁
文件大小: 0K
描述: IC RS485/422 TRANS QUAD 16-SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1,000
類型: 發(fā)射器
驅(qū)動器/接收器數(shù): 4/0
規(guī)程: RS422,RS485
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC W
包裝: 帶卷 (TR)
MAX3040–MAX3045
±10kV ESD-Protected, Quad 5V RS-485/RS-422
Transmitters
_______________________________________________________________________________________
7
Detailed Description
The MAX3040–MAX3045 are quad RS-485/RS-422 trans-
mitters. They operate from a single +5V power supply
and are designed to give optimum performance when
used with the MAX3093E/MAX3095 5V quad RS-485/
RS-422 receivers or MAX3094E/MAX3096 3V quad
RS-485/RS-422 receivers. The MAX3040–MAX3045 only
need 1mA of operating supply current and consume 2nA
when they enter a low-power shutdown mode. The
MAX3040–MAX3045 also feature a hot-swap capability
allowing line insertion without erroneous data transfer.
The MAX3042B/MAX3045B are capable of transferring
data up to 20Mbps, the MAX3041/MAX3044 for data
rates up to 2.5Mbps, and the MAX3040/MAX3043 for
data rates up to 250kbps. All transmitter outputs are pro-
tected to ±10kV using the Human Body Model.
±10kV ESD Protection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against electro-
static discharges (ESD) encountered during handling
and assembly. The MAX3040–MAX3045 transmitter
outputs have extra protection against electrostatic dis-
charges found in normal operation. Maxim’s engineers
have developed state-of-the-art structures to protect
these pins against the application of ±10kV ESD
(Human Body Model), without damage.
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Human Body Model
Figure 6a shows the Human Body Model, and Figure
6b shows the current waveform it generates when dis-
charged into low impedance. This model consists of a
100pF capacitor charged to the ESD voltage of interest,
which is then discharged into the device through a
1.5k
resistor.
R
VOD
VOC
Y
Z
Figure 1. Driver DC Test Circuit
DI
DE
5V
Y
Z
CDIFF
VOD
RDIFF
Figure 2. Driver Timing Test Circuit
DI
3V
0
Z
Y
VO
0
-VO
VO
1.5V
tPLH
1/2 VO
10%
tR
90%
tPHL
1.5V
1/2 VO
10%
tF
VDIFF = V (Y) - V (Z)
VDIFF
tSKEW = | tPLH - tPHL |
Figure 3. Driver Propagation Delays
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0
Y, Z
VOL
Y, Z
0
1.5V
VOL +0.5V
VOH -0.5V
2.5V
tZL(SHDN), tZL
tLZ
tZH(SHDN), tZH
tHZ
DE
Figure 5. Driver Enable and Disable Times
OUTPUT
UNDER TEST
S1
S2
VCC
CL
RL
Figure 4. Driver Enable/Disable Timing Test Load
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