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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� MAX3074EESA+
寤犲晢锛� Maxim Integrated Products
鏂囦欢闋佹暩(sh霉)锛� 13/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC TXRX RS485/422 8-SOIC
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 100
椤炲瀷锛� 鏀剁櫦(f膩)鍣�
椹�(q奴)鍕曞櫒/鎺ユ敹鍣ㄦ暩(sh霉)锛� 1/1
瑕�(gu墨)绋嬶細 RS422锛孯S485
闆绘簮闆诲锛� 3 V ~ 3.6 V
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOIC
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜闈細 1403 (CN2011-ZH PDF)
+3.3V, 卤15kV ESD-Protected, Fail-Safe,
Hot-Swap, RS-485/RS-422 Transceivers
MAX3070E
MAX3073E
MAX3076E
Rt
DE
VCC
RE
GND
VCC RE
GND
DE
RO
DI
9
10
12
11
B
A
Z
Y
0.1
渭F
5
RO
N.C.
DI
2
1, 8, 13
3
6, 7
14
4
VCC
N.C.
A
B
Z
Y
N.C.
RO
RE
DE
DI
GND
D
R
D
R
TYPICAL FULL-DUPLEX OPERATING CIRCUIT
14
13
12
11
10
9
8
1
2
3
4
5
6
7
DIP/SO
R
Pin Configurations and Typical Operating Circuits
MAX3071E
MAX3074E
MAX3077E
Rt
VCC
GND
VCC
GND
RO
DI
5
6
8
7
B
A
Z
Y
0.1
渭F
3
RO
DI
2
4
1
R
D
R
D
R
TYPICAL FULL-DUPLEX OPERATING CIRCUIT
VCC
RO
DI
GND
A
B
Z
Y
8
7
6
5
1
2
3
4
DIP/SO
MAX3072E
MAX3075E
MAX3078E
Rt
DE
RE
B
A
B
A
0.1
渭F
TYPICAL HALF-DUPLEX OPERATING CIRCUIT
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORMS DIAGRAMS.
REFER TO PINS A AND B WHEN DE IS HIGH.
R
D
RO
DI
VCC
B
A
GND
8
7
6
5
1
2
3
4
DIP/SO
RE
DE
R
D
RO
DI
VCC
GND
8
7
6
5
1
2
3
4
RE
DE
D
R
DI
RO
MAX3070E鈥揗AX3079E
20
Maxim Integrated
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
VE-J4R-MY-F4 CONVERTER MOD DC/DC 7.5V 50W
VI-BWX-IV-F1 CONVERTER MOD DC/DC 5.2V 150W
HR25-7TR-6S CONN RECEPT 6POS FMALE PANEL MT
VE-J4R-MY-F3 CONVERTER MOD DC/DC 7.5V 50W
MAX3077EEPA+ IC TXRX RS485/422 8-DIP
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MAX3074EESA+ 鍔熻兘鎻忚堪:RS-422/RS-485 鎺ュ彛 IC 3.3V Fl-Sfe/Ht-Swp RS-485/RS-422 Tcvr RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 鏁�(sh霉)鎿�(j霉)閫熺巼:1136 Kbps 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5.9 mA 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-28 灏佽:Tube
MAX3074EESA+T 鍔熻兘鎻忚堪:RS-422/RS-485 鎺ュ彛 IC 3.3V Fl-Sfe/Ht-Swp RS-485/RS-422 Tcvr RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 鏁�(sh霉)鎿�(j霉)閫熺巼:1136 Kbps 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5.9 mA 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-28 灏佽:Tube
MAX3074EESA-T 鍔熻兘鎻忚堪:RS-422/RS-485 鎺ュ彛 IC RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 鏁�(sh霉)鎿�(j霉)閫熺巼:1136 Kbps 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5.9 mA 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-28 灏佽:Tube
MAX3075EAPA 鍔熻兘鎻忚堪:RS-422/RS-485 鎺ュ彛 IC RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 鏁�(sh霉)鎿�(j霉)閫熺巼:1136 Kbps 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5.9 mA 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-28 灏佽:Tube
MAX3075EAPA+ 鍔熻兘鎻忚堪:RS-422/RS-485 鎺ュ彛 IC 3.3V Fl-Sfe/Ht-Swp RS-485/RS-422 Tcvr RoHS:鍚� 鍒堕€犲晢:Maxim Integrated 鏁�(sh霉)鎿�(j霉)閫熺巼:1136 Kbps 宸ヤ綔闆绘簮闆诲:3 V to 5.5 V 闆绘簮闆绘祦:5.9 mA 宸ヤ綔婧害鑼冨湇:- 40 C to + 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:SOIC-28 灏佽:Tube
鐧�(f膩)甯冪穵鎬ラ噰璩硷紝3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�

閲囪臣闇€姹�

(鑻ュ彧閲囪臣涓€姊濆瀷铏燂紝濉涓€琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔�锛佹偍鍙互绻肩簩(x霉)鐧�(f膩)甯冮噰璩笺€備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�锛屾煡鐪嬪牨鍍�

鐧�(f膩)甯冩垚鍔燂紒鎮ㄥ彲浠ョ辜绾�(x霉)鐧�(f膩)甯冮噰璩�銆備篃鍙互閫�(j矛n)鍏ユ垜鐨勫悗鑷�锛屾煡鐪嬪牨鍍�

*鍨嬭櫉 *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱�(li谩n)绯绘柟寮�

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