- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍� > PDF鐩寗11817 > MAX3107ETG+T (Maxim Integrated Products)IC UART SPI/I2C 128 FIFO 24TQFN PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | MAX3107ETG+T |
| 寤犲晢锛� | Maxim Integrated Products |
| 鏂囦欢闋佹暩(sh霉)锛� | 11/52闋� |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC UART SPI/I2C 128 FIFO 24TQFN |
| 鐢㈠搧鍩硅〒妯″锛� | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 妯欐簴鍖呰锛� | 1 |
| 鐗归粸锛� | 鍏ч儴鎸暕鍣� |
| 閫氶亾鏁�(sh霉)锛� | 4锛孮UART |
| FIFO's锛� | 128 瀛楃瘈(ji茅) |
| 瑕�(gu墨)绋嬶細 | RS232锛孯S485 |
| 闆绘簮闆诲锛� | 2.35 V ~ 3.6 V |
| 甯惰嚜鍕曟祦閲忔帶鍒跺姛鑳斤細 | 鏄� |
| 甯禝rDA 绶ㄧ⒓鍣�/瑙ｇ⒓鍣細 | 鏄� |
| 甯舵晠闅滃暉鍕曚綅妾㈡脯鍔熻兘锛� | 鏄� |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 24-WFQFN 瑁搁湶鐒婄洡 |
| 渚涙噳鍟嗚ō鍌欏皝瑁濓細 | 24-TQFN-EP锛�3.5x3.5锛� |
| 鍖呰锛� | 妯欐簴鍖呰 |
| 鍏跺畠鍚嶇ū锛� | MAX3107ETG+TDKR |
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SPI/I2C UART with 128-Word FIFOs
Multidrop Mode
In multidrop mode, also known as 9-bit mode, the word
length is 8 bits and a 9th bit is used for distinguishing
between an address and a data word. Multidrop mode is
enabled through MODE2[6]: MultiDrop. Parity checking
is disabled and an SpclCharInt[5]: MultiDropInt interrupt
is generated when an address (9th bit set) is received.
It is up to the host processor to filter out the data intend-
ed for its address. Alternatively, the auto data-filtering
mode can be used to automatically filter out the data
intended for the station鈥檚 specific 9-bit mode address.
Auto Data Filtering in Multidrop Mode
In multidrop mode, the MAX3107 can be configured
to automatically filter out data that is not meant for its
address. The address is user-definable either by pro-
gramming a register value or a combination of a register
values and GPIO hardware inputs. Use either XOFF2
or XOFF2[7:4] in combination with GPIO_ to define the
address.
Enable multidrop mode by setting MODE2[6]: MultiDrop
to 1 and enable auto data filtering by setting MODE2[4]:
SpecialChr to 1.
When using register bits in combination with GPIO_ to
define the address, the MSB of the address is written to
XOFF2[7:4] register bits, while the LSBs of the address
are defined through the GPIOs. To enable this mode,
set FlowCtrl[2]: GPIAddr, MODE2[4]: SpecialChr, and
MODE2[6]: MultiDrop to 1. GPIO_ is automatically read
when FlowCtrl[2]: GPIAddr is set to 1, and the address
is updated on logic changes at GPIO_.
In the auto data-filtering mode, the MAX3107 auto-
matically accepts data that is meant for its address and
places this into the receive FIFO, while it discards data
that is not meant for its address. The received address
word is not put into the FIFO.
Auto Transceiver Direction Control
In some half-duplex communication systems, the trans-
ceiver鈥檚 transmitter must be turned off when data is
being received so as not to load the bus. This is the
case in half-duplex RS-485 communication. Similarly
in full-duplex multidrop communication, like RS-485 or
RS-422/V.11, only one transmitter can be enabled at any
one time and the others must be disabled. The MAX3107
can automatically enable/disable a transceiver鈥檚 trans-
mitter and/or receiver. This relieves the host processor
of this time-critical task.
The RTS/CLKOUT output is used to control the transceiv-
ers鈥� transmit enable input and is automatically set high
when the MAX3107鈥檚 transmitter starts transmission.
This occurs as soon as data is present in the transmit
FIFO. Auto transceiver direction control is enabled
through MODE1[4]: TrnscvCtrl. Figure 9 shows a typical
MAX3107 connection in a RS-485 application.
The RTS/CLKOUT output can be set high in advance
of TX transmission by a programmable time period
called the setup time (Figure 10). The setup time is pro-
grammed through HDplxDelay[7:4]. Similarly, the RTS/
CLKOUT signal can be held high for a programmable
period after the transmitter has completed transmission.
The hold time is programmed through HDplxDelay[3:0].
Figure 9. Auto Transceiver Direction Control
MAX3107
MAX13431
TRANSMITTER
TX
B
A
D
RTS/CLKOUT
RX
TxFIFO
RECEIVER
AUTO
TRANSCEIVER
CONTROL
RxFIFO
DI
RO
RE
DE
R
Maxim Integrated
19
MAX3107
鐩搁棞PDF璩囨枡 |
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| MAX3108EWA+ | 鍒堕€犲晢:Maxim Integrated Products 鍔熻兘鎻忚堪:SPI/IAC UART WITH 128-WORD FIFOS IN WLP - Rail/Tube |
| MAX3108EWA+T | 鍔熻兘鎻忚堪:IC UART RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 鎺ュ彛 - UART锛堥€氱敤鐣版鎺ユ敹鍣�/鐧�(f膩)閫佸櫒锛� 绯诲垪:* 妯欐簴鍖呰:250 绯诲垪:- 鐗归粸:* 閫氶亾鏁�(sh霉):2锛孌UART FIFO's:16 瀛楃瘈(ji茅) 瑕�(gu墨)绋�:RS232锛孯S485 闆绘簮闆诲:2.25 V ~ 5.5 V 甯跺苟琛岀鍙�:- 甯惰嚜鍕曟祦閲忔帶鍒跺姛鑳�:鏄� 甯禝rDA 绶ㄧ⒓鍣�/瑙ｇ⒓鍣�:鏄� 甯舵晠闅滃暉鍕曚綅妾㈡脯鍔熻兘:鏄� 甯惰鍒惰В瑾垮櫒鎺у埗鍔熻兘:鏄� 甯禖MOS:鏄� 瀹夎椤炲瀷:琛ㄩ潰璨艰 灏佽/澶栨:48-TQFP 渚涙噳鍟嗚ō鍌欏皝瑁�:48-TQFP锛�7x7锛� 鍖呰:鎵樼洡 鍏跺畠鍚嶇ū:XR16L2551IM-F-ND |
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