參數(shù)資料
型號: MAX3110ECWI+G36
廠商: Maxim Integrated Products
文件頁數(shù): 10/31頁
文件大?。?/td> 0K
描述: IC UART/TXRX RS232 W/CAPS 28SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 25
特點(diǎn): 收發(fā)器
通道數(shù): 1,UART
規(guī)程: RS232,RS485
電源電壓: 4.5 V ~ 5.5 V
帶IrDA 編碼器/解碼器:
帶故障啟動位檢測功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
產(chǎn)品目錄頁面: 1404 (CN2011-ZH PDF)
SPI/MICROWIRE-Compatible UART and ±15kV ESD-
Protected RS-232 Transceivers with Internal Capacitors
Table 4. Write Data (D15, D14 = 1, 0)
Notes:
bit 15: DOUT
R = 1, Data is available to be read or is being read from the
receive register or FIFO.
R = 0, Receive register and FIFO are empty.
bit 14: DOUT
T = 1, Transmit buffer is empty.
T = 0, Transmit buffer is full.
bits 13–11: DOUT
Zeros
bit 10: DOUT
RA/FE = Receive-Activity (UART shutdown)/Framing-Error
(Normal Operation) bit
bit 9: DOUT
CTS = CTS input state. If CTS = 0, then CTS = 1 and vice versa.
bit 8: DOUT
Pr = Received Parity Bit. This is only valid if PE = 1.
bits 7–0: DOUT
D7r–D0r = Received Data Bits. D7r = 0 for L = 1.
bits 15, 14: DIN
1, 0 = Write Data
bits 13–11: DIN
Zeros
bit 10: DIN
TE = 1, Disables transmit and only RTS will be updated.
TE = 0, Enables transmit.
bit 9: DIN
RTS = 1, Configures RTS = 0 (logic low).
RTS = 0, Configures RTS = 1 (logic high).
bit 8: DIN
Pt = 1, Transmit parity bit is high. If PE = 1, a high parity bit will
be transmitted. If PE = 0, then no parity bit will be transmitted.
Pt = 0, Transmit parity bit is low. If PE = 1, a low parity bit will be
transmitted. If PE = 0, then no parity bit will be transmitted.
bits 7–0: DIN
D7t–D0t = Transmitting Data Bits. D7t is ignored when L = 1.
D15 is present at DOUT on CS’s falling edge. Consecutive bits are clocked out on SCLK’s falling edge.
14
0
T
6
D6t
D6r
7
D7t
D7r
15
2
DIN
1
D2t
DOUT
R
D2r
BIT
3
D3t
D3r
0
D0t
D0r
1
D1t
D1r
4
D4t
D4r
5
D5t
D5r
10
TE
RA/FE
11
0
8
Pt
Pr
9
RTS
CTS
12
0
13
0
18
Maxim Integrated
MAX3110E/MAX3111E
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