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參數(shù)資料
| 型號： | MAX3173CAI |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | +3.3V Multiprotocol 3Tx/3Rx Software-Selectable Control Transceivers |
| 中文描述： | TRIPLE LINE TRANSCEIVER, PDSO28 |
| 封裝： | 5.30 MM, 0.65 MM PITCH, SSOP-28 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 271K |
| 代理商： | MAX3173CAI |
M
+3.3V Multiprotocol 3Tx/3Rx
Software-Selectable Control Transceivers
12
______________________________________________________________________________________
Safe
). To aid in rejecting system noise, the
MAX3171/MAX3173 V.10 receiver has 15mV (typ) hys-
teresis. Switch S3 in Figure 11 is open in V.10 mode to
disable the 5k
V.28 termination at the receiver input.
Switch S4 is closed, and switch S5 is open to internally
ground the receiver B input.
V.28 Interface
The V.28 interface is an unbalanced single-ended inter-
face (Figure 12). The V.28 generator provides ±5V
(min) across the load impedance between A
’
and C
’
.
The V.28 standard specifies input trip points at ±3V.
The MAX3171/MAX3173 V.28 mode receiver has a
threshold between +0.8V and +2.0V to ensure that the
receiver has proper fail-safe operation (see
Fail-Safe
). To
aid in rejecting system noise, the MAX3171/MAX3173
V.28 receiver has a 500mV (typ) hysteresis. Switch S3 in
Figure 12 is closed in V.28 mode to enable the 5k
V.28
termination at the receiver input.
Receiver Glitch Rejection
To facilitate operation in an unterminated or otherwise
noisy system, the MAX3171 features 10μs of receiver
input glitch rejection in V.10, V.11, and V.28 modes.
The glitch rejection circuitry blocks the reception of
high-frequency noise (t
B
< 5μs) while receiving a low-
frequency signal (t
B
> 15μs), allowing glitch-free opera-
tion in unterminated systems at up to 64kbps. The
MAX3173 does not have this feature and can be oper-
ated at data rates up to 240kbps if properly terminated.
DTE vs. DCE Operation
Figure 13 shows a DCE or DTE controller-selectable
interface. The DCE/
DTE
input switches the port
’
s mode
of operation. A logic high selects DCE, which enables
Figure 13. Multiprotocol DCE/
DTE
Port
D1
D2
D3
R1
R2
R3
MAX3170
D
RXD(DTE)
TXD(DCE)
RXC(DTE)
SCTE(DCE)
LL(DTE)
LL(DCE)
TXD(DTE)
RXD(DCE)
TXC(DTE)
TXC(DCE)
SCTE(DTE)
RXC(DCE)
M
M
M
M
M
M
D
D1
R4
D4
D2
D3
R1
R2
R3
MAX3171
MAX3173
M
M
M
D
CTS(DTE)
RTS(DCE)
DSR(DTE)
DTR(DCE)
RTS(DTE)
CTS(DCE)
DTR(DTE)
DSR(DCE)
DCD(DTE)
DCD(DCE)
M2
M1
M0
DCE/DTE
C
C
D
D
D
D
D
D
R
R
S
S
L
R
R
R
R
T
T
S
S
T
T
DB-25 CONNECTOR
D
D
R
R
D
D
D
D
D
D
C
C
L
T
T
S
S
T
T
R
R
R
R
13 5
10 8
226
2320 19 4
1
7
18
16 3
9 17
1215 11 24 14 2
MAX3172
MAX3174
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